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[Xen-changelog] [xen-unstable] merge with xen-unstable.hg

From: Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>

Date: Fri, 28 Jul 2006 16:21:41 +0000

Delivery-date: Fri, 28 Jul 2006 09:30:44 -0700

List-id: BK change log <xen-changelog.lists.xensource.com>

# HG changeset patch # User awilliam@xxxxxxxxxxx # Node ID 21918b22746ea1e9d498f8b83f43ee2c2da134bb # Parent 4e7318b0c1e0e212ba5855d25dc228235939c794 # Parent b4d5a36e380bba81db5478c71b80425f4db38248 merge with xen-unstable.hg --- README | 1 docs/src/user.tex | 132 ++++++++- linux-2.6-xen-sparse/arch/i386/kernel/time-xen.c | 21 - linux-2.6-xen-sparse/arch/i386/mm/hypervisor.c | 41 +- linux-2.6-xen-sparse/arch/x86_64/Kconfig | 2 linux-2.6-xen-sparse/drivers/xen/netback/interface.c | 1 linux-2.6-xen-sparse/drivers/xen/netback/loopback.c | 1 linux-2.6-xen-sparse/drivers/xen/netfront/netfront.c | 1 tools/ioemu/console.c | 19 - tools/ioemu/cpu-all.h | 25 + tools/ioemu/exec-all.h | 22 + tools/ioemu/hw/iommu.c | 4 tools/ioemu/hw/vga.c | 133 +++++++++ tools/ioemu/ia64_intrinsic.h | 276 +++++++++++++++++++ tools/ioemu/patches/domain-timeoffset | 10 tools/ioemu/patches/ioemu-ia64 | 93 ++++++ tools/ioemu/patches/qemu-64bit | 49 ++- tools/ioemu/patches/qemu-bugfixes | 37 ++ tools/ioemu/patches/qemu-init-vgabios | 10 tools/ioemu/patches/qemu-target-i386-dm | 81 +++-- tools/ioemu/patches/series | 4 tools/ioemu/patches/shadow-vram | 16 - tools/ioemu/patches/shared-vram | 73 ++--- tools/ioemu/patches/vnc-access-monitor-vt | 34 ++ tools/ioemu/patches/vnc-fixes | 57 ++- tools/ioemu/patches/vnc-start-vncviewer | 12 tools/ioemu/patches/vnc-title-domain-name | 19 + tools/ioemu/target-i386-dm/cpu.h | 4 tools/ioemu/target-i386-dm/exec-dm.c | 22 + tools/ioemu/vl.c | 29 + tools/ioemu/vl.h | 1 tools/ioemu/vnc.c | 101 ++++++ tools/xenstat/libxenstat/src/xenstat.c | 1 xen/arch/x86/hvm/svm/svm.c | 4 xen/arch/x86/mm.c | 7 xen/arch/x86/shadow_public.c | 59 ++-- xen/arch/x86/traps.c | 9 xen/arch/x86/x86_32/mm.c | 5 xen/arch/x86/x86_32/traps.c | 4 xen/arch/x86/x86_64/entry.S | 8 xen/arch/x86/x86_64/mm.c | 6 xen/arch/x86/x86_64/traps.c | 28 + xen/common/schedule.c | 7 xen/include/asm-ia64/perfc_defn.h | 1 xen/include/asm-x86/config.h | 12 xen/include/asm-x86/perfc_defn.h | 147 ++++++++++ xen/include/xen/perfc_defn.h | 138 --------- 47 files changed, 1390 insertions(+), 377 deletions(-) diff -r 4e7318b0c1e0 -r 21918b22746e README --- a/README Wed Jul 26 09:41:24 2006 -0600 +++ b/README Wed Jul 26 10:49:32 2006 -0600 @@ -91,6 +91,7 @@ provided by your Linux distributor: * GNU Binutils * Development install of zlib (e.g., zlib-dev) * Development install of Python v2.3 or later (e.g., python-dev) + * Development install of curses (e.g., libncurses-dev) * bridge-utils package (/sbin/brctl) * iproute package (/sbin/ip) * hotplug or udev diff -r 4e7318b0c1e0 -r 21918b22746e docs/src/user.tex --- a/docs/src/user.tex Wed Jul 26 09:41:24 2006 -0600 +++ b/docs/src/user.tex Wed Jul 26 10:49:32 2006 -0600 @@ -1374,8 +1374,136 @@ To configure a domU to receive a PCI dev %% There are two possible types of privileges: IO privileges and %% administration privileges. - - +\section{Support for virtual Trusted Platform Module (vTPM)} +\label{ss:vtpm} + +Paravirtualized domains can be given access to a virtualized version +of a TPM. This enables applications in these domains to use the services +of the TPM device for example through a TSS stack +\footnote{Trousers TSS stack: http://sourceforge.net/projects/trousers}. +The Xen source repository provides the necessary software components to +enable virtual TPM access. Support is provided through several +different pieces. First, a TPM emulator has been modified to provide TPM's +functionality for the virtual TPM subsystem. Second, a virtual TPM Manager +coordinates the virtual TPMs efforts, manages their creation, and provides +protected key storage using the TPM. Third, a device driver pair providing +a TPM front- and backend is available for XenLinux to deliver TPM commands +from the domain to the virtual TPM manager, which dispatches it to a +software TPM. Since the TPM Manager relies on a HW TPM for protected key +storage, therefore this subsystem requires a Linux-supported hardware TPM. +For development purposes, a TPM emulator is available for use on non-TPM +enabled platforms. + +\subsubsection{Compile-Time Setup} +To enable access to the virtual TPM, the virtual TPM backend driver must +be compiled for a privileged domain (e.g. domain 0). Using the XenLinux +configuration, the necessary driver can be selected in the Xen configuration +section. Unless the driver has been compiled into the kernel, its module +must be activated using the following command: + +\begin{verbatim} +modprobe tpmbk +\end{verbatim} + +Similarly, the TPM frontend driver must be compiled for the kernel trying +to use TPM functionality. Its driver can be selected in the kernel +configuration section Device Driver / Character Devices / TPM Devices. +Along with that the TPM driver for the built-in TPM must be selected. +If the virtual TPM driver has been compiled as module, it +must be activated using the following command: + +\begin{verbatim} +modprobe tpm_xenu +\end{verbatim} + +Furthermore, it is necessary to build the virtual TPM manager and software +TPM by making changes to entries in Xen build configuration files. +The following entry in the file Config.mk in the Xen root source +directory must be made: + +\begin{verbatim} +VTPM_TOOLS ?= y +\end{verbatim} + +After a build of the Xen tree and a reboot of the machine, the TPM backend +drive must be loaded. Once loaded, the virtual TPM manager daemon +must be started before TPM-enabled guest domains may be launched. +To enable being the destination of a virtual TPM Migration, the virtual TPM +migration daemon must also be loaded. + +\begin{verbatim} +vtpm_managerd +\end{verbatim} +\begin{verbatim} +vtpm_migratord +\end{verbatim} + +Once the VTPM manager is running, the VTPM can be accessed by loading the +front end driver in a guest domain. + +\subsubsection{Development and Testing TPM Emulator} +For development and testing on non-TPM enabled platforms, a TPM emulator +can be used in replacement of a platform TPM. First, the entry in the file +tools/vtpm/Rules.mk must look as follows: + +\begin{verbatim} +BUILD_EMULATOR = y +\end{verbatim} + +Second, the entry in the file tool/vtpm\_manager/Rules.mk must be uncommented +as follows: + +\begin{verbatim} +# TCS talks to fifo's rather than /dev/tpm. TPM Emulator assumed on fifos +CFLAGS += -DDUMMY_TPM +\end{verbatim} + +Before starting the virtual TPM Manager, start the emulator by executing +the following in dom0: + +\begin{verbatim} +tpm_emulator clear +\end{verbatim} + +\subsubsection{vTPM Frontend Configuration} +To provide TPM functionality to a user domain, a line must be added to +the virtual TPM configuration file using the following format: + +\begin{verbatim} +vtpm = ['instance=<instance number>, backend=<domain id>'] +\end{verbatim} + +The { \it instance number} reflects the preferred virtual TPM instance +to associate with the domain. If the selected instance is +already associated with another domain, the system will automatically +select the next available instance. An instance number greater than +zero must be provided. It is possible to omit the instance +parameter from the configuration file. + +The {\it domain id} provides the ID of the domain where the +virtual TPM backend driver and virtual TPM are running in. It should +currently always be set to '0'. + + +Examples for valid vtpm entries in the configuration file are + +\begin{verbatim} + vtpm = ['instance=1, backend=0'] +\end{verbatim} +and +\begin{verbatim} + vtpm = ['backend=0']. +\end{verbatim} + +\subsubsection{Using the virtual TPM} + +Access to TPM functionality is provided by the virtual TPM frontend driver. +Similar to existing hardware TPM drivers, this driver provides basic TPM +status information through the {\it sysfs} filesystem. In a Xen user domain +the sysfs entries can be found in /sys/devices/xen/vtpm-0. + +Commands can be sent to the virtual TPM instance using the character +device /dev/tpm0 (major 10, minor 224). % Chapter Storage and FileSytem Management \chapter{Storage and File System Management} diff -r 4e7318b0c1e0 -r 21918b22746e linux-2.6-xen-sparse/arch/i386/kernel/time-xen.c --- a/linux-2.6-xen-sparse/arch/i386/kernel/time-xen.c Wed Jul 26 09:41:24 2006 -0600 +++ b/linux-2.6-xen-sparse/arch/i386/kernel/time-xen.c Wed Jul 26 10:49:32 2006 -0600 @@ -958,11 +958,17 @@ u64 jiffies_to_st(unsigned long j) do { seq = read_seqbegin(&xtime_lock); delta = j - jiffies; - /* NB. The next check can trigger in some wrap-around cases, - * but that's ok: we'll just end up with a shorter timeout. */ - if (delta < 1) - delta = 1; - st = processed_system_time + (delta * (u64)NS_PER_TICK); + if (delta < 1) { + /* Triggers in some wrap-around cases, but that's okay: + * we just end up with a shorter timeout. */ + st = processed_system_time + NS_PER_TICK; + } else if (((unsigned long)delta >> (BITS_PER_LONG-3)) != 0) { + /* Very long timeout means there is no pending timer. + * We indicate this to Xen by passing zero timeout. */ + st = 0; + } else { + st = processed_system_time + delta * (u64)NS_PER_TICK; + } } while (read_seqretry(&xtime_lock, seq)); return st; @@ -989,14 +995,15 @@ static void stop_hz_timer(void) smp_mb(); - /* Leave ourselves in 'tick mode' if rcu or softirq or timer pending. */ + /* Leave ourselves in tick mode if rcu or softirq or timer pending. */ if (rcu_needs_cpu(cpu) || local_softirq_pending() || (j = next_timer_interrupt(), time_before_eq(j, jiffies))) { cpu_clear(cpu, nohz_cpu_mask); j = jiffies + 1; } - BUG_ON(HYPERVISOR_set_timer_op(jiffies_to_st(j)) != 0); + if (HYPERVISOR_set_timer_op(jiffies_to_st(j)) != 0) + BUG(); } static void start_hz_timer(void) diff -r 4e7318b0c1e0 -r 21918b22746e linux-2.6-xen-sparse/arch/i386/mm/hypervisor.c --- a/linux-2.6-xen-sparse/arch/i386/mm/hypervisor.c Wed Jul 26 09:41:24 2006 -0600 +++ b/linux-2.6-xen-sparse/arch/i386/mm/hypervisor.c Wed Jul 26 10:49:32 2006 -0600 @@ -266,6 +266,7 @@ static void contiguous_bitmap_clear( /* Protected by balloon_lock. */ #define MAX_CONTIG_ORDER 9 /* 2MB */ static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER]; +static multicall_entry_t cr_mcl[1<<MAX_CONTIG_ORDER]; /* Ensure multi-page extents are contiguous in machine memory. */ int xen_create_contiguous_region( @@ -310,12 +311,13 @@ int xen_create_contiguous_region( /* 1. Zap current PTEs, remembering MFNs. */ for (i = 0; i < (1UL<<order); i++) { in_frames[i] = pfn_to_mfn((__pa(vstart) >> PAGE_SHIFT) + i); - if (HYPERVISOR_update_va_mapping(vstart + (i*PAGE_SIZE), - __pte_ma(0), 0)) - BUG(); + MULTI_update_va_mapping(cr_mcl + i, vstart + (i*PAGE_SIZE), + __pte_ma(0), 0); set_phys_to_machine((__pa(vstart)>>PAGE_SHIFT)+i, INVALID_P2M_ENTRY); } + if (HYPERVISOR_multicall(cr_mcl, i)) + BUG(); /* 2. Get a new contiguous memory extent. */ out_frame = __pa(vstart) >> PAGE_SHIFT; @@ -343,15 +345,16 @@ int xen_create_contiguous_region( /* 3. Map the new extent in place of old pages. */ for (i = 0; i < (1UL<<order); i++) { frame = success ? (out_frame + i) : in_frames[i]; - if (HYPERVISOR_update_va_mapping(vstart + (i*PAGE_SIZE), - pfn_pte_ma(frame, - PAGE_KERNEL), - 0)) - BUG(); + MULTI_update_va_mapping(cr_mcl + i, vstart + (i*PAGE_SIZE), + pfn_pte_ma(frame, PAGE_KERNEL), 0); set_phys_to_machine((__pa(vstart)>>PAGE_SHIFT)+i, frame); } - flush_tlb_all(); + cr_mcl[i - 1].args[MULTI_UVMFLAGS_INDEX] = order + ? UVMF_TLB_FLUSH|UVMF_ALL + : UVMF_INVLPG|UVMF_ALL; + if (HYPERVISOR_multicall(cr_mcl, i)) + BUG(); if (success) contiguous_bitmap_set(__pa(vstart) >> PAGE_SHIFT, @@ -402,13 +405,14 @@ void xen_destroy_contiguous_region(unsig /* 2. Zap current PTEs. */ for (i = 0; i < (1UL<<order); i++) { - if (HYPERVISOR_update_va_mapping(vstart + (i*PAGE_SIZE), - __pte_ma(0), 0)) - BUG(); + MULTI_update_va_mapping(cr_mcl + i, vstart + (i*PAGE_SIZE), + __pte_ma(0), 0); set_phys_to_machine((__pa(vstart)>>PAGE_SHIFT)+i, INVALID_P2M_ENTRY); out_frames[i] = (__pa(vstart) >> PAGE_SHIFT) + i; } + if (HYPERVISOR_multicall(cr_mcl, i)) + BUG(); /* 3. Do the exchange for non-contiguous MFNs. */ rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange); @@ -429,15 +433,16 @@ void xen_destroy_contiguous_region(unsig /* 4. Map new pages in place of old pages. */ for (i = 0; i < (1UL<<order); i++) { frame = success ? out_frames[i] : (in_frame + i); - if (HYPERVISOR_update_va_mapping(vstart + (i*PAGE_SIZE), - pfn_pte_ma(frame, - PAGE_KERNEL), - 0)) - BUG(); + MULTI_update_va_mapping(cr_mcl + i, vstart + (i*PAGE_SIZE), + pfn_pte_ma(frame, PAGE_KERNEL), 0); set_phys_to_machine((__pa(vstart)>>PAGE_SHIFT)+i, frame); } - flush_tlb_all(); + cr_mcl[i - 1].args[MULTI_UVMFLAGS_INDEX] = order + ? UVMF_TLB_FLUSH|UVMF_ALL + : UVMF_INVLPG|UVMF_ALL; + if (HYPERVISOR_multicall(cr_mcl, i)) + BUG(); balloon_unlock(flags); } diff -r 4e7318b0c1e0 -r 21918b22746e linux-2.6-xen-sparse/arch/x86_64/Kconfig --- a/linux-2.6-xen-sparse/arch/x86_64/Kconfig Wed Jul 26 09:41:24 2006 -0600 +++ b/linux-2.6-xen-sparse/arch/x86_64/Kconfig Wed Jul 26 10:49:32 2006 -0600 @@ -330,7 +330,7 @@ config ARCH_DISCONTIGMEM_DEFAULT config ARCH_SPARSEMEM_ENABLE def_bool y - depends on (NUMA || EXPERIMENTAL) + depends on (NUMA || EXPERIMENTAL) && !X86_64_XEN config ARCH_MEMORY_PROBE def_bool y diff -r 4e7318b0c1e0 -r 21918b22746e linux-2.6-xen-sparse/drivers/xen/netback/interface.c --- a/linux-2.6-xen-sparse/drivers/xen/netback/interface.c Wed Jul 26 09:41:24 2006 -0600 +++ b/linux-2.6-xen-sparse/drivers/xen/netback/interface.c Wed Jul 26 10:49:32 2006 -0600 @@ -76,6 +76,7 @@ static struct ethtool_ops network_ethtoo { .get_tx_csum = ethtool_op_get_tx_csum, .set_tx_csum = ethtool_op_set_tx_csum, + .get_link = ethtool_op_get_link, }; netif_t *netif_alloc(domid_t domid, unsigned int handle, u8 be_mac[ETH_ALEN]) diff -r 4e7318b0c1e0 -r 21918b22746e linux-2.6-xen-sparse/drivers/xen/netback/loopback.c --- a/linux-2.6-xen-sparse/drivers/xen/netback/loopback.c Wed Jul 26 09:41:24 2006 -0600 +++ b/linux-2.6-xen-sparse/drivers/xen/netback/loopback.c Wed Jul 26 10:49:32 2006 -0600 @@ -129,6 +129,7 @@ static struct ethtool_ops network_ethtoo .set_sg = ethtool_op_set_sg, .get_tso = ethtool_op_get_tso, .set_tso = ethtool_op_set_tso, + .get_link = ethtool_op_get_link, }; /* diff -r 4e7318b0c1e0 -r 21918b22746e linux-2.6-xen-sparse/drivers/xen/netfront/netfront.c --- a/linux-2.6-xen-sparse/drivers/xen/netfront/netfront.c Wed Jul 26 09:41:24 2006 -0600 +++ b/linux-2.6-xen-sparse/drivers/xen/netfront/netfront.c Wed Jul 26 10:49:32 2006 -0600 @@ -1201,6 +1201,7 @@ static struct ethtool_ops network_ethtoo .set_sg = xennet_set_sg, .get_tso = ethtool_op_get_tso, .set_tso = xennet_set_tso, + .get_link = ethtool_op_get_link, }; #ifdef CONFIG_SYSFS diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/console.c --- a/tools/ioemu/console.c Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/console.c Wed Jul 26 10:49:32 2006 -0600 @@ -954,11 +954,21 @@ int is_graphic_console(void) return !active_console->text_console; } +void set_color_table(DisplayState *ds) +{ + int i, j; + for(j = 0; j < 2; j++) { + for(i = 0; i < 8; i++) { + color_table[j][i] = + col_expand(ds, vga_get_color(ds, color_table_rgb[j][i])); + } + } +} + CharDriverState *text_console_init(DisplayState *ds) { CharDriverState *chr; TextConsole *s; - int i,j; static int color_inited; chr = qemu_mallocz(sizeof(CharDriverState)); @@ -976,12 +986,7 @@ CharDriverState *text_console_init(Displ if (!color_inited) { color_inited = 1; - for(j = 0; j < 2; j++) { - for(i = 0; i < 8; i++) { - color_table[j][i] = col_expand(s->ds, - vga_get_color(s->ds, color_table_rgb[j][i])); - } - } + set_color_table(ds); } s->y_displayed = 0; s->y_base = 0; diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/cpu-all.h --- a/tools/ioemu/cpu-all.h Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/cpu-all.h Wed Jul 26 10:49:32 2006 -0600 @@ -835,6 +835,31 @@ static __inline__ void atomic_clear_bit( :"=m" (*(volatile long *)addr) :"dIr" (nr)); } +#elif defined(__ia64__) +#include "ia64_intrinsic.h" +#define atomic_set_bit(nr, addr) ({ \ + typeof(*addr) bit, old, new; \ + volatile typeof(*addr) *m; \ + \ + m = (volatile typeof(*addr)*)(addr + nr / (8*sizeof(*addr))); \ + bit = 1 << (nr % (8*sizeof(*addr))); \ + do { \ + old = *m; \ + new = old | bit; \ + } while (cmpxchg_acq(m, old, new) != old); \ +}) + +#define atomic_clear_bit(nr, addr) ({ \ + typeof(*addr) bit, old, new; \ + volatile typeof(*addr) *m; \ + \ + m = (volatile typeof(*addr)*)(addr + nr / (8*sizeof(*addr))); \ + bit = ~(1 << (nr % (8*sizeof(*addr)))); \ + do { \ + old = *m; \ + new = old & bit; \ + } while (cmpxchg_acq(m, old, new) != old); \ +}) #endif /* memory API */ diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/exec-all.h --- a/tools/ioemu/exec-all.h Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/exec-all.h Wed Jul 26 10:49:32 2006 -0600 @@ -391,6 +391,15 @@ static inline int testandset (int *p) } #endif +#ifdef __ia64__ +#include "ia64_intrinsic.h" +static inline int testandset (int *p) +{ + uint32_t o = 0, n = 1; + return (int)cmpxchg_acq(p, o, n); +} +#endif + #ifdef __s390__ static inline int testandset (int *p) { @@ -462,12 +471,13 @@ static inline int testandset (int *p) } #endif -#ifdef __ia64 -#include <ia64intrin.h> - -static inline int testandset (int *p) -{ - return __sync_lock_test_and_set (p, 1); +#ifdef __ia64__ +#include "ia64_intrinsic.h" + +static inline int testandset (int *p) +{ + uint32_t o = 0, n = 1; + return (int)cmpxchg_acq(p, o, n); } #endif diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/hw/iommu.c --- a/tools/ioemu/hw/iommu.c Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/hw/iommu.c Wed Jul 26 10:49:32 2006 -0600 @@ -82,7 +82,11 @@ do { printf("IOMMU: " fmt , ##args); } w #define IOPTE_VALID 0x00000002 /* IOPTE is valid */ #define IOPTE_WAZ 0x00000001 /* Write as zeros */ +#if defined(__i386__) || defined(__x86_64__) #define PAGE_SHIFT 12 +#elif defined(__ia64__) +#define PAGE_SHIFT 14 +#endif #define PAGE_SIZE (1 << PAGE_SHIFT) #define PAGE_MASK (PAGE_SIZE - 1) diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/hw/vga.c --- a/tools/ioemu/hw/vga.c Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/hw/vga.c Wed Jul 26 10:49:32 2006 -0600 @@ -1392,7 +1392,8 @@ static void vga_draw_graphic(VGAState *s static void vga_draw_graphic(VGAState *s, int full_update) { int y1, y, update, page_min, page_max, linesize, y_start, double_scan, mask; - int width, height, shift_control, line_offset, page0, page1, bwidth; + int width, height, shift_control, line_offset, bwidth; + ram_addr_t page0, page1; int disp_width, multi_scan, multi_run; uint8_t *d; uint32_t v, addr1, addr; @@ -1772,6 +1773,136 @@ static void vga_map(PCIDevice *pci_dev, } } +/* do the same job as vgabios before vgabios get ready - yeah */ +void vga_bios_init(VGAState *s) +{ + uint8_t palette_model[192] = { + 0, 0, 0, 0, 0, 170, 0, 170, + 0, 0, 170, 170, 170, 0, 0, 170, + 0, 170, 170, 85, 0, 170, 170, 170, + 85, 85, 85, 85, 85, 255, 85, 255, + 85, 85, 255, 255, 255, 85, 85, 255, + 85, 255, 255, 255, 85, 255, 255, 255, + 0, 21, 0, 0, 21, 42, 0, 63, + 0, 0, 63, 42, 42, 21, 0, 42, + 21, 42, 42, 63, 0, 42, 63, 42, + 0, 21, 21, 0, 21, 63, 0, 63, + 21, 0, 63, 63, 42, 21, 21, 42, + 21, 63, 42, 63, 21, 42, 63, 63, + 21, 0, 0, 21, 0, 42, 21, 42, + 0, 21, 42, 42, 63, 0, 0, 63, + 0, 42, 63, 42, 0, 63, 42, 42, + 21, 0, 21, 21, 0, 63, 21, 42, + 21, 21, 42, 63, 63, 0, 21, 63, + 0, 63, 63, 42, 21, 63, 42, 63, + 21, 21, 0, 21, 21, 42, 21, 63, + 0, 21, 63, 42, 63, 21, 0, 63, + 21, 42, 63, 63, 0, 63, 63, 42, + 21, 21, 21, 21, 21, 63, 21, 63, + 21, 21, 63, 63, 63, 21, 21, 63, + 21, 63, 63, 63, 21, 63, 63, 63 + }; + + s->latch = 0; + + s->sr_index = 3; + s->sr[0] = 3; + s->sr[1] = 0; + s->sr[2] = 3; + s->sr[3] = 0; + s->sr[4] = 2; + s->sr[5] = 0; + s->sr[6] = 0; + s->sr[7] = 0; + + s->gr_index = 5; + s->gr[0] = 0; + s->gr[1] = 0; + s->gr[2] = 0; + s->gr[3] = 0; + s->gr[4] = 0; + s->gr[5] = 16; + s->gr[6] = 14; + s->gr[7] = 15; + s->gr[8] = 255; + + /* changed by out 0x03c0 */ + s->ar_index = 32; + s->ar[0] = 0; + s->ar[1] = 1; + s->ar[2] = 2; + s->ar[3] = 3; + s->ar[4] = 4; + s->ar[5] = 5; + s->ar[6] = 6; + s->ar[7] = 7; + s->ar[8] = 8; + s->ar[9] = 9; + s->ar[10] = 10; + s->ar[11] = 11; + s->ar[12] = 12; + s->ar[13] = 13; + s->ar[14] = 14; + s->ar[15] = 15; + s->ar[16] = 12; + s->ar[17] = 0; + s->ar[18] = 15; + s->ar[19] = 8; + s->ar[20] = 0; + + s->ar_flip_flop = 1; + + s->cr_index = 15; + s->cr[0] = 95; + s->cr[1] = 79; + s->cr[2] = 80; + s->cr[3] = 130; + s->cr[4] = 85; + s->cr[5] = 129; + s->cr[6] = 191; + s->cr[7] = 31; + s->cr[8] = 0; + s->cr[9] = 79; + s->cr[10] = 14; + s->cr[11] = 15; + s->cr[12] = 0; + s->cr[13] = 0; + s->cr[14] = 5; + s->cr[15] = 160; + s->cr[16] = 156; + s->cr[17] = 142; + s->cr[18] = 143; + s->cr[19] = 40; + s->cr[20] = 31; + s->cr[21] = 150; + s->cr[22] = 185; + s->cr[23] = 163; + s->cr[24] = 255; + + s->msr = 103; + s->fcr = 0; + s->st00 = 0; + s->st01 = 0; + + /* dac_* & palette will be initialized by os through out 0x03c8 & + * out 0c03c9(1:3) */ + s->dac_state = 0; + s->dac_sub_index = 0; + s->dac_read_index = 0; + s->dac_write_index = 16; + s->dac_cache[0] = 255; + s->dac_cache[1] = 255; + s->dac_cache[2] = 255; + + /* palette */ + memcpy(s->palette, palette_model, 192); + + s->bank_offset = 0; + s->graphic_mode = -1; + + /* TODO: add vbe support if enabled */ +} + /* when used on xen environment, the vga_ram_base is not used */ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, unsigned long vga_ram_offset, int vga_ram_size) diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/domain-timeoffset --- a/tools/ioemu/patches/domain-timeoffset Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/domain-timeoffset Wed Jul 26 10:49:32 2006 -0600 @@ -1,7 +1,7 @@ Index: ioemu/hw/mc146818rtc.c Index: ioemu/hw/mc146818rtc.c =================================================================== ---- ioemu.orig/hw/mc146818rtc.c 2006-07-14 15:55:55.450963213 +0100 -+++ ioemu/hw/mc146818rtc.c 2006-07-14 15:56:02.195195680 +0100 +--- ioemu.orig/hw/mc146818rtc.c 2006-07-26 15:17:35.110819901 +0100 ++++ ioemu/hw/mc146818rtc.c 2006-07-26 15:17:40.292255496 +0100 @@ -178,10 +178,27 @@ } } @@ -46,8 +46,8 @@ Index: ioemu/hw/mc146818rtc.c static void rtc_copy_date(RTCState *s) Index: ioemu/hw/pc.c =================================================================== ---- ioemu.orig/hw/pc.c 2006-07-14 15:56:01.774243586 +0100 -+++ ioemu/hw/pc.c 2006-07-14 15:56:02.196195566 +0100 +--- ioemu.orig/hw/pc.c 2006-07-26 15:17:39.820306906 +0100 ++++ ioemu/hw/pc.c 2006-07-26 15:17:40.293255388 +0100 @@ -151,7 +151,7 @@ } @@ -117,8 +117,8 @@ Index: ioemu/hw/pc.c QEMUMachine pc_machine = { Index: ioemu/vl.c =================================================================== ---- ioemu.orig/vl.c 2006-07-14 15:56:02.010216731 +0100 -+++ ioemu/vl.c 2006-07-14 15:56:02.198195338 +0100 +--- ioemu.orig/vl.c 2006-07-26 15:17:40.169268893 +0100 ++++ ioemu/vl.c 2006-07-26 15:17:40.296255061 +0100 @@ -164,6 +164,8 @@ int xc_handle; @@ -162,7 +162,7 @@ Index: ioemu/vl.c } } } -@@ -5963,7 +5971,8 @@ +@@ -5992,7 +6000,8 @@ machine->init(ram_size, vga_ram_size, boot_device, ds, fd_filename, snapshot, @@ -174,8 +174,8 @@ Index: ioemu/vl.c qemu_mod_timer(gui_timer, qemu_get_clock(rt_clock)); Index: ioemu/vl.h =================================================================== ---- ioemu.orig/vl.h 2006-07-14 15:56:01.779243017 +0100 -+++ ioemu/vl.h 2006-07-14 15:56:02.199195224 +0100 +--- ioemu.orig/vl.h 2006-07-26 15:17:39.825306361 +0100 ++++ ioemu/vl.h 2006-07-26 15:17:40.297254952 +0100 @@ -556,7 +556,7 @@ int boot_device, DisplayState *ds, const char **fd_filename, int snapshot, diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/qemu-64bit --- a/tools/ioemu/patches/qemu-64bit Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/qemu-64bit Wed Jul 26 10:49:32 2006 -0600 @@ -1,7 +1,8 @@ diff -r 2b3e57b3e1ec cpu-all.h -diff -r 2b3e57b3e1ec cpu-all.h ---- a/cpu-all.h Mon Jun 26 15:16:39 2006 +0100 -+++ b/cpu-all.h Mon Jun 26 15:16:44 2006 +0100 -@@ -822,7 +822,7 @@ int cpu_inl(CPUState *env, int addr); +Index: ioemu/cpu-all.h +=================================================================== +--- ioemu.orig/cpu-all.h 2006-07-26 13:19:49.515051864 +0100 ++++ ioemu/cpu-all.h 2006-07-26 13:19:49.563046860 +0100 +@@ -822,7 +822,7 @@ /* memory API */ @@ -10,10 +11,11 @@ diff -r 2b3e57b3e1ec cpu-all.h extern int phys_ram_fd; extern uint8_t *phys_ram_base; extern uint8_t *phys_ram_dirty; -diff -r 2b3e57b3e1ec hw/pc.c ---- a/hw/pc.c Mon Jun 26 15:16:39 2006 +0100 -+++ b/hw/pc.c Mon Jun 26 15:16:44 2006 +0100 -@@ -147,7 +147,7 @@ static void cmos_init_hd(int type_ofs, i +Index: ioemu/hw/pc.c +=================================================================== +--- ioemu.orig/hw/pc.c 2006-07-26 13:19:49.516051760 +0100 ++++ ioemu/hw/pc.c 2006-07-26 13:19:49.564046755 +0100 +@@ -147,7 +147,7 @@ } /* hd_table must contain 4 block drivers */ @@ -22,7 +24,7 @@ diff -r 2b3e57b3e1ec hw/pc.c { RTCState *s = rtc_state; int val; -@@ -604,7 +604,7 @@ static void pc_init_ne2k_isa(NICInfo *nd +@@ -604,7 +604,7 @@ } /* PC hardware initialisation */ @@ -31,7 +33,7 @@ diff -r 2b3e57b3e1ec hw/pc.c DisplayState *ds, const char **fd_filename, int snapshot, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, -@@ -853,7 +853,7 @@ static void pc_init1(int ram_size, int v +@@ -853,7 +853,7 @@ } } @@ -40,7 +42,7 @@ diff -r 2b3e57b3e1ec hw/pc.c DisplayState *ds, const char **fd_filename, int snapshot, const char *kernel_filename, -@@ -866,7 +866,7 @@ static void pc_init_pci(int ram_size, in +@@ -866,7 +866,7 @@ initrd_filename, 1); } @@ -49,10 +51,11 @@ diff -r 2b3e57b3e1ec hw/pc.c DisplayState *ds, const char **fd_filename, int snapshot, const char *kernel_filename, -diff -r 2b3e57b3e1ec vl.c ---- a/vl.c Mon Jun 26 15:16:39 2006 +0100 -+++ b/vl.c Mon Jun 26 15:16:44 2006 +0100 -@@ -123,7 +123,7 @@ const char* keyboard_layout = NULL; +Index: ioemu/vl.c +=================================================================== +--- ioemu.orig/vl.c 2006-07-26 13:19:49.552048007 +0100 ++++ ioemu/vl.c 2006-07-26 13:19:49.566046547 +0100 +@@ -123,7 +123,7 @@ const char* keyboard_layout = NULL; int64_t ticks_per_sec; int boot_device = 'c'; @@ -61,7 +64,7 @@ diff -r 2b3e57b3e1ec vl.c int pit_min_timer_count = 0; int nb_nics; NICInfo nd_table[MAX_NICS]; -@@ -5320,7 +5320,7 @@ int main(int argc, char **argv) +@@ -5320,7 +5320,7 @@ help(); break; case QEMU_OPTION_m: @@ -70,10 +73,11 @@ diff -r 2b3e57b3e1ec vl.c if (ram_size <= 0) help(); if (ram_size > PHYS_RAM_MAX_SIZE) { -diff -r 2b3e57b3e1ec vl.h ---- a/vl.h Mon Jun 26 15:16:39 2006 +0100 -+++ b/vl.h Mon Jun 26 15:16:44 2006 +0100 -@@ -138,7 +138,7 @@ extern int xc_handle; +Index: ioemu/vl.h +=================================================================== +--- ioemu.orig/vl.h 2006-07-26 13:19:49.552048007 +0100 ++++ ioemu/vl.h 2006-07-26 13:19:49.567046443 +0100 +@@ -138,7 +138,7 @@ extern int xc_handle; extern int domid; @@ -82,7 +86,7 @@ diff -r 2b3e57b3e1ec vl.h extern int bios_size; extern int rtc_utc; extern int cirrus_vga_enabled; -@@ -542,7 +542,7 @@ int qcow_compress_cluster(BlockDriverSta +@@ -542,7 +542,7 @@ #ifndef QEMU_TOOL @@ -91,3 +95,17 @@ diff -r 2b3e57b3e1ec vl.h int boot_device, DisplayState *ds, const char **fd_filename, int snapshot, const char *kernel_filename, const char *kernel_cmdline, +Index: ioemu/hw/vga.c +=================================================================== +--- ioemu.orig/hw/vga.c 2006-07-26 13:19:49.549048319 +0100 ++++ ioemu/hw/vga.c 2006-07-26 13:20:17.956085603 +0100 +@@ -1293,7 +1293,8 @@ + static void vga_draw_graphic(VGAState *s, int full_update) + { + int y1, y, update, page_min, page_max, linesize, y_start, double_scan, mask; +- int width, height, shift_control, line_offset, page0, page1, bwidth; ++ int width, height, shift_control, line_offset, bwidth; ++ ram_addr_t page0, page1; + int disp_width, multi_scan, multi_run; + uint8_t *d; + uint32_t v, addr1, addr; diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/qemu-bugfixes --- a/tools/ioemu/patches/qemu-bugfixes Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/qemu-bugfixes Wed Jul 26 10:49:32 2006 -0600 @@ -1,7 +1,8 @@ diff -r d76fb4ee3e48 console.c -diff -r d76fb4ee3e48 console.c ---- a/console.c Mon Jun 26 15:16:44 2006 +0100 -+++ b/console.c Mon Jun 26 15:47:43 2006 +0100 -@@ -449,7 +449,7 @@ static void text_console_resize(TextCons +Index: ioemu/console.c +=================================================================== +--- ioemu.orig/console.c 2006-07-26 13:39:11.999009495 +0100 ++++ ioemu/console.c 2006-07-26 14:15:19.413719225 +0100 +@@ -449,7 +449,7 @@ c++; } } @@ -10,9 +11,47 @@ diff -r d76fb4ee3e48 console.c s->cells = cells; } -diff -r d76fb4ee3e48 usb-linux.c ---- a/usb-linux.c Mon Jun 26 15:16:44 2006 +0100 -+++ b/usb-linux.c Mon Jun 26 15:47:43 2006 +0100 +@@ -954,11 +954,21 @@ + return !active_console->text_console; + } + ++void set_color_table(DisplayState *ds) ++{ ++ int i, j; ++ for(j = 0; j < 2; j++) { ++ for(i = 0; i < 8; i++) { ++ color_table[j][i] = ++ col_expand(ds, vga_get_color(ds, color_table_rgb[j][i])); ++ } ++ } ++} ++ + CharDriverState *text_console_init(DisplayState *ds) + { + CharDriverState *chr; + TextConsole *s; +- int i,j; + static int color_inited; + + chr = qemu_mallocz(sizeof(CharDriverState)); +@@ -976,12 +986,7 @@ + + if (!color_inited) { + color_inited = 1; +- for(j = 0; j < 2; j++) { +- for(i = 0; i < 8; i++) { +- color_table[j][i] = col_expand(s->ds, +- vga_get_color(s->ds, color_table_rgb[j][i])); +- } +- } ++ set_color_table(ds); + } + s->y_displayed = 0; + s->y_base = 0; +Index: ioemu/usb-linux.c +=================================================================== +--- ioemu.orig/usb-linux.c 2006-07-26 13:39:11.999009495 +0100 ++++ ioemu/usb-linux.c 2006-07-26 13:39:16.622514851 +0100 @@ -26,6 +26,7 @@ #if defined(__linux__) #include <dirent.h> diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/qemu-target-i386-dm --- a/tools/ioemu/patches/qemu-target-i386-dm Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/qemu-target-i386-dm Wed Jul 26 10:49:32 2006 -0600 @@ -1,7 +1,8 @@ diff -r 9af27fed6713 Makefile.target -diff -r 9af27fed6713 Makefile.target ---- a/Makefile.target Wed Jun 21 17:46:33 2006 +0100 -+++ b/Makefile.target Mon Jun 26 15:59:21 2006 +0100 -@@ -57,6 +57,8 @@ QEMU_SYSTEM=qemu-fast +Index: ioemu/Makefile.target +=================================================================== +--- ioemu.orig/Makefile.target 2006-07-26 11:45:57.572129351 +0100 ++++ ioemu/Makefile.target 2006-07-26 11:45:57.589127569 +0100 +@@ -57,6 +57,8 @@ QEMU_SYSTEM=qemu-fast endif @@ -10,7 +11,7 @@ diff -r 9af27fed6713 Makefile.target ifdef CONFIG_USER_ONLY PROGS=$(QEMU_USER) else -@@ -274,6 +276,9 @@ OBJS+=gdbstub.o +@@ -274,6 +276,9 @@ OBJS+=gdbstub.o endif @@ -20,7 +21,7 @@ diff -r 9af27fed6713 Makefile.target all: $(PROGS) $(QEMU_USER): $(OBJS) -@@ -328,7 +333,7 @@ ifeq ($(TARGET_BASE_ARCH), i386) +@@ -328,7 +333,7 @@ ifeq ($(TARGET_BASE_ARCH), i386) # Hardware support VL_OBJS+= ide.o pckbd.o ps2.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) @@ -29,10 +30,11 @@ diff -r 9af27fed6713 Makefile.target VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o DEFINES += -DHAS_AUDIO endif -diff -r 9af27fed6713 configure ---- a/configure Wed Jun 21 17:46:33 2006 +0100 -+++ b/configure Mon Jun 26 15:59:21 2006 +0100 -@@ -359,6 +359,8 @@ if test -z "$target_list" ; then +Index: ioemu/configure +=================================================================== +--- ioemu.orig/configure 2006-07-26 11:45:57.573129246 +0100 ++++ ioemu/configure 2006-07-26 11:45:57.590127464 +0100 +@@ -359,6 +359,8 @@ if [ "$user" = "yes" ] ; then target_list="i386-user arm-user armeb-user sparc-user ppc-user mips-user mipsel-user $target_list" fi @@ -41,10 +43,11 @@ diff -r 9af27fed6713 configure else target_list=`echo "$target_list" | sed -e 's/,/ /g'` fi -diff -r 9af27fed6713 monitor.c ---- a/monitor.c Wed Jun 21 17:46:33 2006 +0100 -+++ b/monitor.c Mon Jun 26 15:59:21 2006 +0100 -@@ -1142,6 +1142,10 @@ static term_cmd_t info_cmds[] = { +Index: ioemu/monitor.c +=================================================================== +--- ioemu.orig/monitor.c 2006-07-26 11:45:57.576128931 +0100 ++++ ioemu/monitor.c 2006-07-26 11:45:57.591127359 +0100 +@@ -1142,6 +1142,10 @@ "", "show host USB devices", }, { "profile", "", do_info_profile, "", "show profiling information", }, @@ -55,9 +58,10 @@ diff -r 9af27fed6713 monitor.c { NULL, NULL, }, }; -diff -r 9af27fed6713 vl.c ---- a/vl.c Wed Jun 21 17:46:33 2006 +0100 -+++ b/vl.c Mon Jun 26 15:59:21 2006 +0100 +Index: ioemu/vl.c +=================================================================== +--- ioemu.orig/vl.c 2006-07-26 11:45:57.579128617 +0100 ++++ ioemu/vl.c 2006-07-26 11:45:57.593127149 +0100 @@ -87,7 +87,7 @@ #include "exec-all.h" @@ -67,7 +71,7 @@ diff -r 9af27fed6713 vl.c //#define DEBUG_UNUSED_IOPORT //#define DEBUG_IOPORT -@@ -4382,7 +4382,7 @@ typedef struct QEMUResetEntry { +@@ -4382,7 +4382,7 @@ static QEMUResetEntry *first_reset_entry; static int reset_requested; @@ -76,7 +80,7 @@ diff -r 9af27fed6713 vl.c static int powerdown_requested; void qemu_register_reset(QEMUResetHandler *func, void *opaque) -@@ -4534,6 +4534,7 @@ void main_loop_wait(int timeout) +@@ -4534,6 +4534,7 @@ qemu_get_clock(rt_clock)); } @@ -84,7 +88,7 @@ diff -r 9af27fed6713 vl.c static CPUState *cur_cpu; int main_loop(void) -@@ -4608,6 +4609,7 @@ int main_loop(void) +@@ -4608,6 +4609,7 @@ cpu_disable_ticks(); return ret; } @@ -92,9 +96,10 @@ diff -r 9af27fed6713 vl.c void help(void) { -diff -r 9af27fed6713 vl.h ---- a/vl.h Wed Jun 21 17:46:33 2006 +0100 -+++ b/vl.h Mon Jun 26 15:59:21 2006 +0100 +Index: ioemu/vl.h +=================================================================== +--- ioemu.orig/vl.h 2006-07-26 11:45:39.289045710 +0100 ++++ ioemu/vl.h 2006-07-26 11:45:57.594127044 +0100 @@ -38,6 +38,8 @@ #include <fcntl.h> #include <sys/stat.h> @@ -104,19 +109,19 @@ diff -r 9af27fed6713 vl.h #ifndef O_LARGEFILE #define O_LARGEFILE 0 -@@ -130,6 +132,11 @@ void qemu_system_powerdown(void); - #endif +@@ -131,6 +133,11 @@ void main_loop_wait(int timeout); -+ + +extern FILE *logfile; + +extern int xc_handle; +extern int domid; - ++ extern int ram_size; extern int bios_size; -@@ -814,6 +821,7 @@ uint32_t pic_intack_read(PicState2 *s); + extern int rtc_utc; +@@ -814,6 +821,7 @@ uint32_t pic_intack_read(PicState2 *s); void pic_info(void); void irq_info(void); @@ -124,9 +129,10 @@ diff -r 9af27fed6713 vl.h /* APIC */ typedef struct IOAPICState IOAPICState; -diff -r 9af27fed6713 target-i386-dm/cpu.h ---- /dev/null Thu Jan 01 00:00:00 1970 +0000 -+++ b/target-i386-dm/cpu.h Mon Jun 26 15:59:21 2006 +0100 +Index: ioemu/target-i386-dm/cpu.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ ioemu/target-i386-dm/cpu.h 2006-07-26 11:45:57.594127044 +0100 @@ -0,0 +1,86 @@ +/* + * i386 virtual CPU header @@ -214,9 +220,10 @@ diff -r 9af27fed6713 target-i386-dm/cpu. +#include "cpu-all.h" + +#endif /* CPU_I386_H */ -diff -r 9af27fed6713 target-i386-dm/exec-dm.c ---- /dev/null Thu Jan 01 00:00:00 1970 +0000 -+++ b/target-i386-dm/exec-dm.c Mon Jun 26 15:59:21 2006 +0100 +Index: ioemu/target-i386-dm/exec-dm.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ ioemu/target-i386-dm/exec-dm.c 2006-07-26 11:46:01.059763730 +0100 @@ -0,0 +1,512 @@ +/* + * virtual page mapping and translated block handling @@ -602,7 +609,7 @@ diff -r 9af27fed6713 target-i386-dm/exec + start = mmio[i].start; + end = mmio[i].start + mmio[i].size; + -+ if ((addr >= start) && (addr <= end)){ ++ if ((addr >= start) && (addr < end)){ + return (mmio[i].io_index >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); + } + } @@ -730,9 +737,10 @@ diff -r 9af27fed6713 target-i386-dm/exec + + return; +} -diff -r 9af27fed6713 target-i386-dm/helper2.c ---- /dev/null Thu Jan 01 00:00:00 1970 +0000 -+++ b/target-i386-dm/helper2.c Mon Jun 26 15:59:21 2006 +0100 +Index: ioemu/target-i386-dm/helper2.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ ioemu/target-i386-dm/helper2.c 2006-07-26 11:45:57.596126835 +0100 @@ -0,0 +1,464 @@ +/* + * i386 helpers (without register variable usage) @@ -1198,9 +1206,10 @@ diff -r 9af27fed6713 target-i386-dm/help + } + return 0; +} -diff -r 9af27fed6713 target-i386-dm/i8259-dm.c ---- /dev/null Thu Jan 01 00:00:00 1970 +0000 -+++ b/target-i386-dm/i8259-dm.c Mon Jun 26 15:59:21 2006 +0100 +Index: ioemu/target-i386-dm/i8259-dm.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ ioemu/target-i386-dm/i8259-dm.c 2006-07-26 11:45:57.596126835 +0100 @@ -0,0 +1,107 @@ +/* Xen 8259 stub for interrupt controller emulation + * @@ -1309,18 +1318,20 @@ diff -r 9af27fed6713 target-i386-dm/i825 + void *alt_irq_opaque) +{ +} -diff -r 9af27fed6713 target-i386-dm/qemu-dm.debug ---- /dev/null Thu Jan 01 00:00:00 1970 +0000 -+++ b/target-i386-dm/qemu-dm.debug Mon Jun 26 15:59:21 2006 +0100 +Index: ioemu/target-i386-dm/qemu-dm.debug +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ ioemu/target-i386-dm/qemu-dm.debug 2006-07-26 11:45:57.596126835 +0100 @@ -0,0 +1,5 @@ +#!/bin/sh + +echo $* > /tmp/args +echo $DISPLAY >> /tmp/args +exec /usr/lib/xen/bin/qemu-dm $* -diff -r 9af27fed6713 target-i386-dm/qemu-ifup ---- /dev/null Thu Jan 01 00:00:00 1970 +0000 -+++ b/target-i386-dm/qemu-ifup Mon Jun 26 15:59:21 2006 +0100 +Index: ioemu/target-i386-dm/qemu-ifup +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ ioemu/target-i386-dm/qemu-ifup 2006-07-26 11:45:57.597126730 +0100 @@ -0,0 +1,10 @@ +#!/bin/sh + diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/series --- a/tools/ioemu/patches/series Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/series Wed Jul 26 10:49:32 2006 -0600 @@ -10,9 +10,11 @@ xen-domain-name xen-domain-name xen-domid xen-mm +ioemu-ia64 qemu-smp qemu-no-apic qemu-nobios +qemu-init-vgabios xen-network qemu-timer domain-reset @@ -31,3 +33,5 @@ vnc-cleanup vnc-cleanup vnc-fixes vnc-start-vncviewer +vnc-title-domain-name +vnc-access-monitor-vt diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/shadow-vram --- a/tools/ioemu/patches/shadow-vram Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/shadow-vram Wed Jul 26 10:49:32 2006 -0600 @@ -1,7 +1,8 @@ diff -r 0ef2ae12258c hw/vga.c -diff -r 0ef2ae12258c hw/vga.c ---- a/hw/vga.c Mon Jun 26 16:07:22 2006 +0100 -+++ b/hw/vga.c Tue Jun 27 09:42:44 2006 +0100 -@@ -1287,6 +1287,105 @@ void vga_invalidate_scanlines(VGAState * +Index: ioemu/hw/vga.c +=================================================================== +--- ioemu.orig/hw/vga.c 2006-07-26 15:17:39.821306797 +0100 ++++ ioemu/hw/vga.c 2006-07-26 15:17:40.017285449 +0100 +@@ -1287,6 +1287,105 @@ } } @@ -107,7 +108,7 @@ diff -r 0ef2ae12258c hw/vga.c /* * graphic modes */ -@@ -1381,6 +1480,11 @@ static void vga_draw_graphic(VGAState *s +@@ -1382,6 +1481,11 @@ printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n", width, height, v, line_offset, s->cr[9], s->cr[0x17], s->line_compare, s->sr[0x01]); #endif @@ -119,7 +120,7 @@ diff -r 0ef2ae12258c hw/vga.c addr1 = (s->start_addr * 4); bwidth = width * 4; y_start = -1; -@@ -1699,6 +1803,14 @@ void vga_common_init(VGAState *s, Displa +@@ -1830,6 +1934,14 @@ vga_reset(s); @@ -134,9 +135,10 @@ diff -r 0ef2ae12258c hw/vga.c s->vram_ptr = qemu_malloc(vga_ram_size); s->vram_offset = vga_ram_offset; s->vram_size = vga_ram_size; -diff -r 0ef2ae12258c hw/vga_int.h ---- a/hw/vga_int.h Mon Jun 26 16:07:22 2006 +0100 -+++ b/hw/vga_int.h Tue Jun 27 09:42:44 2006 +0100 +Index: ioemu/hw/vga_int.h +=================================================================== +--- ioemu.orig/hw/vga_int.h 2006-07-26 15:17:39.822306688 +0100 ++++ ioemu/hw/vga_int.h 2006-07-26 15:17:40.017285449 +0100 @@ -76,6 +76,7 @@ #define VGA_STATE_COMMON \ diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/shared-vram --- a/tools/ioemu/patches/shared-vram Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/shared-vram Wed Jul 26 10:49:32 2006 -0600 @@ -1,6 +1,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c -diff -r 62e05863ec04 hw/cirrus_vga.c ---- a/hw/cirrus_vga.c Mon Jun 26 15:18:40 2006 +0100 -+++ b/hw/cirrus_vga.c Mon Jun 26 15:19:40 2006 +0100 +Index: ioemu/hw/cirrus_vga.c +=================================================================== +--- ioemu.orig/hw/cirrus_vga.c 2006-07-26 15:17:35.230806831 +0100 ++++ ioemu/hw/cirrus_vga.c 2006-07-26 15:17:39.819307015 +0100 @@ -28,6 +28,9 @@ */ #include "vl.h" @@ -11,7 +12,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c /* * TODO: -@@ -231,6 +234,8 @@ typedef struct CirrusVGAState { +@@ -231,6 +234,8 @@ int cirrus_linear_io_addr; int cirrus_linear_bitblt_io_addr; int cirrus_mmio_io_addr; @@ -20,7 +21,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c uint32_t cirrus_addr_mask; uint32_t linear_mmio_mask; uint8_t cirrus_shadow_gr0; -@@ -267,6 +272,8 @@ typedef struct CirrusVGAState { +@@ -267,6 +272,8 @@ int last_hw_cursor_y_end; int real_vram_size; /* XXX: suppress that */ CPUWriteMemoryFunc **cirrus_linear_write; @@ -29,7 +30,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c } CirrusVGAState; typedef struct PCICirrusVGAState { -@@ -276,6 +283,8 @@ typedef struct PCICirrusVGAState { +@@ -276,6 +283,8 @@ static uint8_t rop_to_index[256]; @@ -38,7 +39,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c /*************************************** * * prototypes. -@@ -2520,6 +2529,80 @@ static CPUWriteMemoryFunc *cirrus_linear +@@ -2520,6 +2529,80 @@ cirrus_linear_bitblt_writel, }; @@ -119,7 +120,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c /* Compute the memory access functions */ static void cirrus_update_memory_access(CirrusVGAState *s) { -@@ -2538,11 +2621,39 @@ static void cirrus_update_memory_access( +@@ -2538,11 +2621,39 @@ mode = s->gr[0x05] & 0x7; if (mode < 4 || mode > 5 || ((s->gr[0x0B] & 0x4) == 0)) { @@ -159,7 +160,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c s->cirrus_linear_write[0] = cirrus_linear_writeb; s->cirrus_linear_write[1] = cirrus_linear_writew; s->cirrus_linear_write[2] = cirrus_linear_writel; -@@ -3136,6 +3247,13 @@ static void cirrus_pci_lfb_map(PCIDevice +@@ -3136,6 +3247,13 @@ /* XXX: add byte swapping apertures */ cpu_register_physical_memory(addr, s->vram_size, s->cirrus_linear_io_addr); @@ -173,10 +174,11 @@ diff -r 62e05863ec04 hw/cirrus_vga.c cpu_register_physical_memory(addr + 0x1000000, 0x400000, s->cirrus_linear_bitblt_io_addr); } -diff -r 62e05863ec04 hw/pc.c ---- a/hw/pc.c Mon Jun 26 15:18:40 2006 +0100 -+++ b/hw/pc.c Mon Jun 26 15:19:40 2006 +0100 -@@ -783,14 +783,14 @@ static void pc_init1(uint64_t ram_size, +Index: ioemu/hw/pc.c +=================================================================== +--- ioemu.orig/hw/pc.c 2006-07-26 15:17:39.752314312 +0100 ++++ ioemu/hw/pc.c 2006-07-26 15:17:39.820306906 +0100 +@@ -783,14 +783,14 @@ if (cirrus_vga_enabled) { if (pci_enabled) { pci_cirrus_vga_init(pci_bus, @@ -194,18 +196,19 @@ diff -r 62e05863ec04 hw/pc.c vga_ram_size, 0, 0); } -diff -r 62e05863ec04 hw/vga.c ---- a/hw/vga.c Mon Jun 26 15:18:40 2006 +0100 -+++ b/hw/vga.c Mon Jun 26 15:19:40 2006 +0100 -@@ -1668,6 +1668,7 @@ static void vga_map(PCIDevice *pci_dev, - } +Index: ioemu/hw/vga.c +=================================================================== +--- ioemu.orig/hw/vga.c 2006-07-26 15:17:39.352357879 +0100 ++++ ioemu/hw/vga.c 2006-07-26 15:17:39.821306797 +0100 +@@ -1799,6 +1799,7 @@ + /* TODO: add vbe support if enabled */ } +/* when used on xen environment, the vga_ram_base is not used */ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, unsigned long vga_ram_offset, int vga_ram_size) { -@@ -1698,7 +1699,7 @@ void vga_common_init(VGAState *s, Displa +@@ -1829,7 +1830,7 @@ vga_reset(s); @@ -214,12 +217,10 @@ diff -r 62e05863ec04 hw/vga.c s->vram_offset = vga_ram_offset; s->vram_size = vga_ram_size; s->ds = ds; -@@ -1808,6 +1809,31 @@ int vga_initialize(PCIBus *bus, DisplayS - #endif - } +@@ -1941,6 +1942,31 @@ return 0; -+} -+ + } + +void *vga_update_vram(VGAState *s, void *vga_ram_base, int vga_ram_size) +{ + uint8_t *old_pointer; @@ -243,27 +244,30 @@ diff -r 62e05863ec04 hw/vga.c + s->vram_ptr = vga_ram_base; + + return old_pointer; - } - ++} ++ /********************************************************/ -diff -r 62e05863ec04 hw/vga_int.h ---- a/hw/vga_int.h Mon Jun 26 15:18:40 2006 +0100 -+++ b/hw/vga_int.h Mon Jun 26 15:19:40 2006 +0100 -@@ -166,5 +166,6 @@ void vga_draw_cursor_line_32(uint8_t *d1 + /* vga screen dump */ + +Index: ioemu/hw/vga_int.h +=================================================================== +--- ioemu.orig/hw/vga_int.h 2006-07-26 15:17:38.201483242 +0100 ++++ ioemu/hw/vga_int.h 2006-07-26 15:17:39.822306688 +0100 +@@ -166,5 +166,6 @@ unsigned int color0, unsigned int color1, unsigned int color_xor); +void *vga_update_vram(VGAState *s, void *vga_ram_base, int vga_ram_size); extern const uint8_t sr_mask[8]; extern const uint8_t gr_mask[16]; -diff -r 62e05863ec04 vl.c ---- a/vl.c Mon Jun 26 15:18:40 2006 +0100 -+++ b/vl.c Mon Jun 26 15:19:40 2006 +0100 -@@ -5147,6 +5147,78 @@ static void select_soundhw (const char * - #endif +Index: ioemu/vl.c +=================================================================== +--- ioemu.orig/vl.c 2006-07-26 15:17:39.755313985 +0100 ++++ ioemu/vl.c 2006-07-26 15:17:39.824306470 +0100 +@@ -5148,6 +5148,78 @@ #define MAX_NET_CLIENTS 32 -+ + +#include <xg_private.h> + +/* FIXME Flush the shadow page */ @@ -335,13 +339,15 @@ diff -r 62e05863ec04 vl.c + + return 0; +} - ++ int main(int argc, char **argv) { -diff -r 62e05863ec04 vl.h ---- a/vl.h Mon Jun 26 15:18:40 2006 +0100 -+++ b/vl.h Mon Jun 26 15:19:40 2006 +0100 -@@ -136,6 +136,13 @@ extern int reset_requested; + #ifdef CONFIG_GDBSTUB +Index: ioemu/vl.h +=================================================================== +--- ioemu.orig/vl.h 2006-07-26 15:17:39.621328580 +0100 ++++ ioemu/vl.h 2006-07-26 15:17:39.825306361 +0100 +@@ -136,6 +136,13 @@ void main_loop_wait(int timeout); diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/vnc-fixes --- a/tools/ioemu/patches/vnc-fixes Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/vnc-fixes Wed Jul 26 10:49:32 2006 -0600 @@ -1,8 +1,8 @@ Index: ioemu/vl.c Index: ioemu/vl.c =================================================================== ---- ioemu.orig/vl.c 2006-07-14 15:56:03.043099185 +0100 -+++ ioemu/vl.c 2006-07-14 15:56:03.123090082 +0100 -@@ -5974,8 +5974,10 @@ +--- ioemu.orig/vl.c 2006-07-26 14:29:04.481598583 +0100 ++++ ioemu/vl.c 2006-07-26 14:31:22.668325993 +0100 +@@ -6003,8 +6003,10 @@ kernel_filename, kernel_cmdline, initrd_filename, timeoffset); @@ -17,8 +17,8 @@ Index: ioemu/vl.c if (use_gdbstub) { Index: ioemu/vnc.c =================================================================== ---- ioemu.orig/vnc.c 2006-07-14 15:56:03.040099527 +0100 -+++ ioemu/vnc.c 2006-07-14 15:56:03.124089968 +0100 +--- ioemu.orig/vnc.c 2006-07-26 14:29:04.479598804 +0100 ++++ ioemu/vnc.c 2006-07-26 14:31:22.669325883 +0100 @@ -3,6 +3,7 @@ * * Copyright (C) 2006 Anthony Liguori <anthony@xxxxxxxxxxxxx> @@ -112,7 +112,7 @@ Index: ioemu/vnc.c } static void vnc_framebuffer_update(VncState *vs, int x, int y, int w, int h, -@@ -109,11 +142,15 @@ +@@ -109,16 +142,23 @@ static void vnc_dpy_resize(DisplayState *ds, int w, int h) { VncState *vs = ds->opaque; @@ -129,7 +129,16 @@ Index: ioemu/vnc.c fprintf(stderr, "vnc: memory allocation failed\n"); exit(1); } -@@ -131,6 +168,10 @@ + +- ds->depth = vs->depth * 8; ++ if (ds->depth != vs->depth * 8) { ++ ds->depth = vs->depth * 8; ++ set_color_table(ds); ++ } + ds->width = w; + ds->height = h; + ds->linesize = w * vs->depth; +@@ -131,6 +171,10 @@ vs->width = ds->width; vs->height = ds->height; } @@ -140,7 +149,7 @@ Index: ioemu/vnc.c } static void send_framebuffer_update_raw(VncState *vs, int x, int y, int w, int h) -@@ -215,8 +256,20 @@ +@@ -215,8 +259,20 @@ int y = 0; int pitch = ds->linesize; VncState *vs = ds->opaque; @@ -162,7 +171,7 @@ Index: ioemu/vnc.c if (dst_y > src_y) { y = h - 1; -@@ -238,31 +291,34 @@ +@@ -238,31 +294,34 @@ old_row += pitch; } @@ -209,16 +218,16 @@ Index: ioemu/vnc.c { VncState *vs = opaque; int64_t now = qemu_get_clock(rt_clock); -@@ -274,11 +330,12 @@ +@@ -274,11 +333,12 @@ uint64_t width_mask; int n_rectangles; int saved_offset; - int has_dirty = 0; +- +- width_mask = (1ULL << (vs->width / 16)) - 1; + int maxx, maxy; + int tile_bytes = vs->depth * DP2X(vs, 1); -- width_mask = (1ULL << (vs->width / 16)) - 1; -- - if (vs->width == 1024) + if (vs->width != DP2X(vs, DIRTY_PIXEL_BITS)) + width_mask = (1ULL << X2DP_UP(vs, vs->ds->width)) - 1; @@ -226,7 +235,7 @@ Index: ioemu/vnc.c width_mask = ~(0ULL); /* Walk through the dirty map and eliminate tiles that -@@ -294,16 +351,18 @@ +@@ -294,16 +354,18 @@ ptr = row; old_ptr = old_row; @@ -253,7 +262,7 @@ Index: ioemu/vnc.c } } -@@ -311,7 +370,8 @@ +@@ -311,7 +373,8 @@ old_row += vs->ds->linesize; } @@ -263,7 +272,7 @@ Index: ioemu/vnc.c goto out; /* Count rectangles */ -@@ -321,40 +381,61 @@ +@@ -321,40 +384,61 @@ saved_offset = vs->output.offset; vnc_write_u16(vs, 0); @@ -337,7 +346,7 @@ Index: ioemu/vnc.c static void vnc_timer_init(VncState *vs) { if (vs->timer == NULL) { -@@ -365,8 +446,6 @@ +@@ -365,8 +449,6 @@ static void vnc_dpy_refresh(DisplayState *ds) { @@ -346,7 +355,7 @@ Index: ioemu/vnc.c vga_hw_update(); } -@@ -402,7 +481,7 @@ +@@ -402,7 +484,7 @@ static void buffer_reset(Buffer *buffer) { @@ -355,7 +364,7 @@ Index: ioemu/vnc.c } static void buffer_append(Buffer *buffer, const void *data, size_t len) -@@ -443,12 +522,12 @@ +@@ -443,12 +525,12 @@ if (!ret) return; @@ -371,7 +380,7 @@ Index: ioemu/vnc.c } static void vnc_read_when(VncState *vs, VncReadEvent *func, size_t expecting) -@@ -480,11 +559,11 @@ +@@ -480,11 +562,11 @@ return; if (!ret) { @@ -386,7 +395,7 @@ Index: ioemu/vnc.c } } -@@ -492,9 +571,9 @@ +@@ -492,9 +574,9 @@ { buffer_reserve(&vs->output, len); @@ -399,7 +408,7 @@ Index: ioemu/vnc.c buffer_append(&vs->output, data, len); } -@@ -616,24 +695,25 @@ +@@ -616,24 +698,25 @@ do_key_event(vs, down, sym); } @@ -438,7 +447,7 @@ Index: ioemu/vnc.c } static void set_encodings(VncState *vs, int32_t *encodings, size_t n_encodings) -@@ -690,8 +770,6 @@ +@@ -690,8 +773,6 @@ vnc_client_error(vs); vnc_dpy_resize(vs->ds, vs->ds->width, vs->ds->height); @@ -447,7 +456,7 @@ Index: ioemu/vnc.c vga_hw_invalidate(); vga_hw_update(); -@@ -848,11 +926,11 @@ +@@ -848,11 +929,11 @@ vnc_write(vs, "RFB 003.003\n", 12); vnc_flush(vs); vnc_read_when(vs, protocol_version, 12); @@ -461,7 +470,7 @@ Index: ioemu/vnc.c } } -@@ -909,17 +987,15 @@ +@@ -909,17 +990,15 @@ exit(1); } @@ -482,3 +491,15 @@ Index: ioemu/vnc.c - vnc_dpy_resize(vs->ds, 640, 400); } +Index: ioemu/vl.h +=================================================================== +--- ioemu.orig/vl.h 2006-07-26 14:31:22.669325883 +0100 ++++ ioemu/vl.h 2006-07-26 14:32:44.505279724 +0100 +@@ -301,6 +301,7 @@ + int is_graphic_console(void); + CharDriverState *text_console_init(DisplayState *ds); + void console_select(unsigned int index); ++void set_color_table(DisplayState *ds); + + /* serial ports */ + diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/vnc-start-vncviewer --- a/tools/ioemu/patches/vnc-start-vncviewer Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/patches/vnc-start-vncviewer Wed Jul 26 10:49:32 2006 -0600 @@ -1,8 +1,8 @@ Index: ioemu/vnc.c Index: ioemu/vnc.c =================================================================== ---- ioemu.orig/vnc.c 2006-07-14 18:29:36.810169908 +0100 -+++ ioemu/vnc.c 2006-07-14 18:30:17.437628819 +0100 -@@ -999,3 +999,25 @@ +--- ioemu.orig/vnc.c 2006-07-26 14:33:08.166663983 +0100 ++++ ioemu/vnc.c 2006-07-26 14:33:08.225657462 +0100 +@@ -1002,3 +1002,25 @@ vnc_dpy_resize(vs->ds, 640, 400); } @@ -30,8 +30,8 @@ Index: ioemu/vnc.c +} Index: ioemu/vl.c =================================================================== ---- ioemu.orig/vl.c 2006-07-14 18:29:36.809170020 +0100 -+++ ioemu/vl.c 2006-07-14 18:30:17.435629043 +0100 +--- ioemu.orig/vl.c 2006-07-26 14:33:08.165664094 +0100 ++++ ioemu/vl.c 2006-07-26 14:33:08.227657240 +0100 @@ -121,6 +121,7 @@ int bios_size; static DisplayState display_state; @@ -82,7 +82,7 @@ Index: ioemu/vl.c case QEMU_OPTION_domainname: strncat(domain_name, optarg, sizeof(domain_name) - 20); break; -@@ -5881,6 +5889,8 @@ +@@ -5910,6 +5918,8 @@ dumb_display_init(ds); } else if (vnc_display != -1) { vnc_display_init(ds, vnc_display); @@ -93,9 +93,9 @@ Index: ioemu/vl.c sdl_display_init(ds, full_screen); Index: ioemu/vl.h =================================================================== ---- ioemu.orig/vl.h 2006-07-14 18:29:36.810169908 +0100 -+++ ioemu/vl.h 2006-07-14 18:30:17.436628931 +0100 -@@ -732,6 +732,7 @@ +--- ioemu.orig/vl.h 2006-07-26 14:33:08.167663873 +0100 ++++ ioemu/vl.h 2006-07-26 14:33:08.228657130 +0100 +@@ -733,6 +733,7 @@ /* vnc.c */ void vnc_display_init(DisplayState *ds, int display); diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/target-i386-dm/cpu.h --- a/tools/ioemu/target-i386-dm/cpu.h Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/target-i386-dm/cpu.h Wed Jul 26 10:49:32 2006 -0600 @@ -80,7 +80,11 @@ int cpu_x86_inl(CPUX86State *env, int ad /* helper2.c */ int main_loop(void); +#if defined(__i386__) || defined(__x86_64__) #define TARGET_PAGE_BITS 12 +#elif defined(__ia64__) +#define TARGET_PAGE_BITS 14 +#endif #include "cpu-all.h" #endif /* CPU_I386_H */ diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/target-i386-dm/exec-dm.c --- a/tools/ioemu/target-i386-dm/exec-dm.c Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/target-i386-dm/exec-dm.c Wed Jul 26 10:49:32 2006 -0600 @@ -340,6 +340,23 @@ CPUReadMemoryFunc **cpu_get_io_memory_re return io_mem_read[io_index >> IO_MEM_SHIFT]; } +#ifdef __ia64__ +/* IA64 has seperate I/D cache, with coherence maintained by DMA controller. + * So to emulate right behavior that guest OS is assumed, we need to flush + * I/D cache here. + */ +static void sync_icache(unsigned long address, int len) +{ + int l; + + for(l = 0; l < (len + 32); l += 32) + __ia64_fc(address + l); + + ia64_sync_i(); + ia64_srlz_i(); +} +#endif + /* physical memory access (slow version, mainly for debug) */ #if defined(CONFIG_USER_ONLY) void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, @@ -382,7 +399,7 @@ int iomem_index(target_phys_addr_t addr) start = mmio[i].start; end = mmio[i].start + mmio[i].size; - if ((addr >= start) && (addr <= end)){ + if ((addr >= start) && (addr < end)){ return (mmio[i].io_index >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); } } @@ -455,6 +472,9 @@ void cpu_physical_memory_rw(target_phys_ ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK); memcpy(buf, ptr, l); +#ifdef __ia64__ + sync_icache((unsigned long)ptr, l); +#endif } } len -= l; diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/vl.c --- a/tools/ioemu/vl.c Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/vl.c Wed Jul 26 10:49:32 2006 -0600 @@ -5754,6 +5754,7 @@ int main(int argc, char **argv) exit(-1); } +#if defined(__i386__) || defined(__x86_64__) if (xc_get_pfn_list(xc_handle, domid, page_array, nr_pages) != nr_pages) { fprintf(logfile, "xc_get_pfn_list returned error %d\n", errno); exit(-1); @@ -5774,6 +5775,34 @@ int main(int argc, char **argv) fprintf(logfile, "shared page at pfn:%lx, mfn: %"PRIx64"\n", nr_pages - 1, (uint64_t)(page_array[nr_pages - 1])); +#elif defined(__ia64__) + if (xc_ia64_get_pfn_list(xc_handle, domid, + page_array, 0, nr_pages) != nr_pages) { + fprintf(logfile, "xc_ia64_get_pfn_list returned error %d\n", errno); + exit(-1); + } + + phys_ram_base = xc_map_foreign_batch(xc_handle, domid, + PROT_READ|PROT_WRITE, + page_array, nr_pages); + if (phys_ram_base == 0) { + fprintf(logfile, "xc_map_foreign_batch returned error %d\n", errno); + exit(-1); + } + + if (xc_ia64_get_pfn_list(xc_handle, domid, page_array, + nr_pages + (GFW_SIZE >> PAGE_SHIFT), 1)!= 1){ + fprintf(logfile, "xc_ia64_get_pfn_list returned error %d\n", errno); + exit(-1); + } + + shared_page = xc_map_foreign_range(xc_handle, domid, PAGE_SIZE, + PROT_READ|PROT_WRITE, + page_array[0]); + + fprintf(logfile, "shared page at pfn:%lx, mfn: %l016x\n", + IO_PAGE_START >> PAGE_SHIFT, page_array[0]); +#endif #else /* !CONFIG_DM */ #ifdef CONFIG_SOFTMMU diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/vl.h --- a/tools/ioemu/vl.h Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/vl.h Wed Jul 26 10:49:32 2006 -0600 @@ -301,6 +301,7 @@ int is_graphic_console(void); int is_graphic_console(void); CharDriverState *text_console_init(DisplayState *ds); void console_select(unsigned int index); +void set_color_table(DisplayState *ds); /* serial ports */ diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/vnc.c --- a/tools/ioemu/vnc.c Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/ioemu/vnc.c Wed Jul 26 10:49:32 2006 -0600 @@ -32,6 +32,10 @@ #include "vnc_keysym.h" #include "keymaps.c" +#define XK_MISCELLANY +#define XK_LATIN1 +#include <X11/keysymdef.h> + typedef struct Buffer { size_t capacity; @@ -64,6 +68,7 @@ struct VncState Buffer output; Buffer input; kbd_layout_t *kbd_layout; + int ctl_keys; /* Ctrl+Alt starts calibration */ VncReadEvent *read_handler; size_t read_handler_expect; @@ -155,7 +160,10 @@ static void vnc_dpy_resize(DisplayState exit(1); } - ds->depth = vs->depth * 8; + if (ds->depth != vs->depth * 8) { + ds->depth = vs->depth * 8; + set_color_table(ds); + } ds->width = w; ds->height = h; ds->linesize = w * vs->depth; @@ -676,16 +684,80 @@ static void pointer_event(VncState *vs, static void do_key_event(VncState *vs, int down, uint32_t sym) { - int keycode; - - keycode = keysym2scancode(vs->kbd_layout, sym & 0xFFFF); - - if (keycode & 0x80) - kbd_put_keycode(0xe0); - if (down) - kbd_put_keycode(keycode & 0x7f); - else - kbd_put_keycode(keycode | 0x80); + sym &= 0xFFFF; + + if (is_graphic_console()) { + int keycode; + + keycode = keysym2scancode(vs->kbd_layout, sym); + if (keycode & 0x80) + kbd_put_keycode(0xe0); + if (down) + kbd_put_keycode(keycode & 0x7f); + else + kbd_put_keycode(keycode | 0x80); + } else if (down) { + int qemu_keysym = 0; + + if (sym <= 128) /* normal ascii */ + qemu_keysym = sym; + else { + switch (sym) { + case XK_Up: qemu_keysym = QEMU_KEY_UP; break; + case XK_Down: qemu_keysym = QEMU_KEY_DOWN; break; + case XK_Left: qemu_keysym = QEMU_KEY_LEFT; break; + case XK_Right: qemu_keysym = QEMU_KEY_RIGHT; break; + case XK_Home: qemu_keysym = QEMU_KEY_HOME; break; + case XK_End: qemu_keysym = QEMU_KEY_END; break; + case XK_Page_Up: qemu_keysym = QEMU_KEY_PAGEUP; break; + case XK_Page_Down: qemu_keysym = QEMU_KEY_PAGEDOWN; break; + case XK_BackSpace: qemu_keysym = QEMU_KEY_BACKSPACE; break; + case XK_Delete: qemu_keysym = QEMU_KEY_DELETE; break; + case XK_Return: + case XK_Linefeed: qemu_keysym = sym; break; + default: break; + } + } + if (qemu_keysym != 0) + kbd_put_keysym(qemu_keysym); + } + + if (down) { + switch (sym) { + case XK_Control_L: + vs->ctl_keys |= 1; + break; + + case XK_Alt_L: + vs->ctl_keys |= 2; + break; + + default: + break; + } + } else { + switch (sym) { + case XK_Control_L: + vs->ctl_keys &= ~1; + break; + + case XK_Alt_L: + vs->ctl_keys &= ~2; + break; + + case XK_1 ... XK_9: + if ((vs->ctl_keys & 3) != 3) + break; + + console_select(sym - XK_1); + if (is_graphic_console()) { + /* tell the vga console to redisplay itself */ + vga_hw_invalidate(); + vnc_dpy_update(vs->ds, 0, 0, vs->ds->width, vs->ds->height); + } + break; + } + } } static void key_event(VncState *vs, int down, uint32_t sym) @@ -847,6 +919,7 @@ static int protocol_client_msg(VncState static int protocol_client_init(VncState *vs, char *data, size_t len) { + size_t l; char pad[3] = { 0, 0, 0 }; vs->width = vs->ds->width; @@ -883,8 +956,10 @@ static int protocol_client_init(VncState vnc_write(vs, pad, 3); /* padding */ - vnc_write_u32(vs, 4); - vnc_write(vs, "QEMU", 4); + l = strlen(domain_name); + vnc_write_u32(vs, l); + vnc_write(vs, domain_name, l); + vnc_flush(vs); vnc_read_when(vs, protocol_client_msg, 1); diff -r 4e7318b0c1e0 -r 21918b22746e tools/xenstat/libxenstat/src/xenstat.c --- a/tools/xenstat/libxenstat/src/xenstat.c Wed Jul 26 09:41:24 2006 -0600 +++ b/tools/xenstat/libxenstat/src/xenstat.c Wed Jul 26 10:49:32 2006 -0600 @@ -20,7 +20,6 @@ #include <stdio.h> #include <string.h> #include <unistd.h> -#include <linux/compiler.h> #include <fcntl.h> #include <dirent.h> #include <sys/types.h> diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/hvm/svm/svm.c --- a/xen/arch/x86/hvm/svm/svm.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/hvm/svm/svm.c Wed Jul 26 10:49:32 2006 -0600 @@ -1766,7 +1766,7 @@ static int mov_to_cr(int gpreg, int cr, if ( svm_pgbit_test(v) ) { /* The guest is a 32-bit PAE guest. */ -#if CONFIG_PAGING_LEVELS >= 4 +#if CONFIG_PAGING_LEVELS >= 3 unsigned long mfn, old_base_mfn; if( !shadow_set_guest_paging_levels(v->domain, PAGING_L3) ) @@ -1810,7 +1810,7 @@ static int mov_to_cr(int gpreg, int cr, else { /* The guest is a 64 bit or 32-bit PAE guest. */ -#if CONFIG_PAGING_LEVELS >= 4 +#if CONFIG_PAGING_LEVELS >= 3 if ( (v->domain->arch.ops != NULL) && v->domain->arch.ops->guest_paging_levels == PAGING_L2) { diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/mm.c --- a/xen/arch/x86/mm.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/mm.c Wed Jul 26 10:49:32 2006 -0600 @@ -3881,6 +3881,13 @@ void memguard_unguard_range(void *p, uns #endif +void memguard_guard_stack(void *p) +{ + BUILD_BUG_ON((DEBUG_STACK_SIZE + PAGE_SIZE) > STACK_SIZE); + p = (void *)((unsigned long)p + STACK_SIZE - DEBUG_STACK_SIZE - PAGE_SIZE); + memguard_guard_range(p, PAGE_SIZE); +} + /* * Local variables: * mode: C diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/shadow_public.c --- a/xen/arch/x86/shadow_public.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/shadow_public.c Wed Jul 26 10:49:32 2006 -0600 @@ -398,7 +398,7 @@ static void alloc_monitor_pagetable(stru unsigned long m2mfn, m3mfn; l2_pgentry_t *mpl2e; l3_pgentry_t *mpl3e; - struct page_info *m2mfn_info, *m3mfn_info, *page; + struct page_info *m2mfn_info, *m3mfn_info; struct domain *d = v->domain; int i; @@ -411,40 +411,62 @@ static void alloc_monitor_pagetable(stru mpl3e = (l3_pgentry_t *) map_domain_page_global(m3mfn); memset(mpl3e, 0, L3_PAGETABLE_ENTRIES * sizeof(l3_pgentry_t)); + v->arch.monitor_table = pagetable_from_pfn(m3mfn); + v->arch.monitor_vtable = (l2_pgentry_t *) mpl3e; + m2mfn_info = alloc_domheap_page(NULL); ASSERT( m2mfn_info ); m2mfn = page_to_mfn(m2mfn_info); mpl2e = (l2_pgentry_t *) map_domain_page(m2mfn); - memset(mpl2e, 0, L2_PAGETABLE_ENTRIES * sizeof(l2_pgentry_t)); + memset(mpl2e, 0, PAGE_SIZE); + + /* Map L2 page into L3 */ + mpl3e[L3_PAGETABLE_ENTRIES - 1] = l3e_from_pfn(m2mfn, _PAGE_PRESENT); memcpy(&mpl2e[L2_PAGETABLE_FIRST_XEN_SLOT & (L2_PAGETABLE_ENTRIES-1)], &idle_pg_table_l2[L2_PAGETABLE_FIRST_XEN_SLOT], L2_PAGETABLE_XEN_SLOTS * sizeof(l2_pgentry_t)); - /* - * Map L2 page into L3 - */ - mpl3e[L3_PAGETABLE_ENTRIES - 1] = l3e_from_pfn(m2mfn, _PAGE_PRESENT); - page = l3e_get_page(mpl3e[L3_PAGETABLE_ENTRIES - 1]); for ( i = 0; i < PDPT_L2_ENTRIES; i++ ) mpl2e[l2_table_offset(PERDOMAIN_VIRT_START) + i] = l2e_from_page( - virt_to_page(d->arch.mm_perdomain_pt) + i, + virt_to_page(d->arch.mm_perdomain_pt) + i, __PAGE_HYPERVISOR); for ( i = 0; i < (LINEARPT_MBYTES >> (L2_PAGETABLE_SHIFT - 20)); i++ ) mpl2e[l2_table_offset(LINEAR_PT_VIRT_START) + i] = (l3e_get_flags(mpl3e[i]) & _PAGE_PRESENT) ? l2e_from_pfn(l3e_get_pfn(mpl3e[i]), __PAGE_HYPERVISOR) : l2e_empty(); - for ( i = 0; i < (MACHPHYS_MBYTES >> (L2_PAGETABLE_SHIFT - 20)); i++ ) - mpl2e[l2_table_offset(RO_MPT_VIRT_START) + i] = l2e_empty(); - - v->arch.monitor_table = pagetable_from_pfn(m3mfn); - v->arch.monitor_vtable = (l2_pgentry_t *) mpl3e; if ( v->vcpu_id == 0 ) + { + unsigned long m1mfn; + l1_pgentry_t *mpl1e; + struct page_info *m1mfn_info; + + /* + * 2 l2 slots are allocated here, so that 4M for p2m table, + * with this we can guarantee PCI MMIO p2m entries, especially + * Cirrus VGA, can be seen by all other vcpus. + */ + for ( i = 0; i < 2; i++ ) + { + m1mfn_info = alloc_domheap_page(NULL); + ASSERT( m1mfn_info ); + + m1mfn = page_to_mfn(m1mfn_info); + mpl1e = (l1_pgentry_t *) map_domain_page(m1mfn); + memset(mpl1e, 0, PAGE_SIZE); + unmap_domain_page(mpl1e); + + /* Map L1 page into L2 */ + mpl2e[l2_table_offset(RO_MPT_VIRT_START) + i] = + l2e_from_pfn(m1mfn, __PAGE_HYPERVISOR); + } + alloc_p2m_table(d); + } else { unsigned long mfn; @@ -468,14 +490,9 @@ static void alloc_monitor_pagetable(stru l2tab = map_domain_page(l3e_get_pfn(l3e)); - /* - * Just one l2 slot is used here, so at most 2M for p2m table: - * ((4K * 512)/sizeof(unsigned long)) * 4K = 2G - * should be OK on PAE xen, since Qemu DM can only map 1.5G VMX - * guest memory. - */ - mpl2e[l2_table_offset(RO_MPT_VIRT_START)] = - l2tab[l2_table_offset(RO_MPT_VIRT_START)]; + for ( i = 0; i < (MACHPHYS_MBYTES >> (L2_PAGETABLE_SHIFT - 20)); i++ ) + mpl2e[l2_table_offset(RO_MPT_VIRT_START) + i] = + l2tab[l2_table_offset(RO_MPT_VIRT_START) + i]; unmap_domain_page(l2tab); unmap_domain_page(l3tab); diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/traps.c --- a/xen/arch/x86/traps.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/traps.c Wed Jul 26 10:49:32 2006 -0600 @@ -279,11 +279,14 @@ void show_stack_overflow(unsigned long e void show_stack_overflow(unsigned long esp) { #ifdef MEMORY_GUARD - unsigned long esp_top = get_stack_bottom() & PAGE_MASK; + unsigned long esp_top; unsigned long *stack, addr; - /* Trigger overflow trace if %esp is within 100 bytes of the guard page. */ - if ( ((esp - esp_top) > 100) && ((esp_top - esp) > 100) ) + esp_top = (esp | (STACK_SIZE - 1)) - DEBUG_STACK_SIZE; + + /* Trigger overflow trace if %esp is within 512 bytes of the guard page. */ + if ( ((unsigned long)(esp - esp_top) > 512) && + ((unsigned long)(esp_top - esp) > 512) ) return; if ( esp < esp_top ) diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/x86_32/mm.c --- a/xen/arch/x86/x86_32/mm.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/x86_32/mm.c Wed Jul 26 10:49:32 2006 -0600 @@ -345,11 +345,6 @@ int check_descriptor(struct desc_struct return 0; } -void memguard_guard_stack(void *p) -{ - memguard_guard_range(p, PAGE_SIZE); -} - /* * Local variables: * mode: C diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/x86_32/traps.c --- a/xen/arch/x86/x86_32/traps.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/x86_32/traps.c Wed Jul 26 10:49:32 2006 -0600 @@ -122,6 +122,7 @@ asmlinkage void do_double_fault(void) { struct tss_struct *tss = &doublefault_tss; unsigned int cpu = ((tss->back_link>>3)-__FIRST_TSS_ENTRY)>>1; + char taint_str[TAINT_STRING_MAX_LEN]; watchdog_disable(); @@ -129,6 +130,9 @@ asmlinkage void do_double_fault(void) /* Find information saved during fault and dump it to the console. */ tss = &init_tss[cpu]; + printk("*** DOUBLE FAULT: Xen-%d.%d%s %s\n", + XEN_VERSION, XEN_SUBVERSION, XEN_EXTRAVERSION, + print_tainted(taint_str)); printk("CPU: %d\nEIP: %04x:[<%08x>]", cpu, tss->cs, tss->eip); print_symbol(" %s\n", tss->eip); diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/x86_64/entry.S --- a/xen/arch/x86/x86_64/entry.S Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/x86_64/entry.S Wed Jul 26 10:49:32 2006 -0600 @@ -471,8 +471,10 @@ ENTRY(spurious_interrupt_bug) jmp handle_exception ENTRY(double_fault) - movl $TRAP_double_fault,4(%rsp) - jmp handle_exception + SAVE_ALL + movq %rsp,%rdi + call do_double_fault + ud2 ENTRY(nmi) pushq $0 @@ -518,7 +520,7 @@ ENTRY(exception_table) .quad do_bounds .quad do_invalid_op .quad math_state_restore - .quad do_double_fault + .quad 0 # double_fault .quad do_coprocessor_segment_overrun .quad do_invalid_TSS .quad do_segment_not_present diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/x86_64/mm.c --- a/xen/arch/x86/x86_64/mm.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/x86_64/mm.c Wed Jul 26 10:49:32 2006 -0600 @@ -323,12 +323,6 @@ int check_descriptor(struct desc_struct return 0; } -void memguard_guard_stack(void *p) -{ - p = (void *)((unsigned long)p + PAGE_SIZE); - memguard_guard_range(p, 2 * PAGE_SIZE); -} - /* * Local variables: * mode: C diff -r 4e7318b0c1e0 -r 21918b22746e xen/arch/x86/x86_64/traps.c --- a/xen/arch/x86/x86_64/traps.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/arch/x86/x86_64/traps.c Wed Jul 26 10:49:32 2006 -0600 @@ -116,16 +116,38 @@ asmlinkage void double_fault(void); asmlinkage void double_fault(void); asmlinkage void do_double_fault(struct cpu_user_regs *regs) { + unsigned int cpu, tr; + char taint_str[TAINT_STRING_MAX_LEN]; + + asm ( "str %0" : "=r" (tr) ); + cpu = ((tr >> 3) - __FIRST_TSS_ENTRY) >> 2; + watchdog_disable(); console_force_unlock(); /* Find information saved during fault and dump it to the console. */ - printk("************************************\n"); - show_registers(regs); + printk("*** DOUBLE FAULT: Xen-%d.%d%s %s\n", + XEN_VERSION, XEN_SUBVERSION, XEN_EXTRAVERSION, + print_tainted(taint_str)); + printk("CPU: %d\nRIP: %04x:[<%016lx>]", + cpu, regs->cs, regs->rip); + print_symbol(" %s", regs->rip); + printk("\nRFLAGS: %016lx\n", regs->rflags); + printk("rax: %016lx rbx: %016lx rcx: %016lx\n", + regs->rax, regs->rbx, regs->rcx); + printk("rdx: %016lx rsi: %016lx rdi: %016lx\n", + regs->rdx, regs->rsi, regs->rdi); + printk("rbp: %016lx rsp: %016lx r8: %016lx\n", + regs->rbp, regs->rsp, regs->r8); + printk("r9: %016lx r10: %016lx r11: %016lx\n", + regs->r9, regs->r10, regs->r11); + printk("r12: %016lx r13: %016lx r14: %016lx\n", + regs->r12, regs->r13, regs->r14); + printk("r15: %016lx\n", regs->r15); show_stack_overflow(regs->rsp); printk("************************************\n"); - printk("CPU%d DOUBLE FAULT -- system shutdown\n", smp_processor_id()); + printk("CPU%d DOUBLE FAULT -- system shutdown\n", cpu); printk("System needs manual reset.\n"); printk("************************************\n"); diff -r 4e7318b0c1e0 -r 21918b22746e xen/common/schedule.c --- a/xen/common/schedule.c Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/common/schedule.c Wed Jul 26 10:49:32 2006 -0600 @@ -404,12 +404,15 @@ long do_set_timer_op(s_time_t timeout) * for timeouts wrapped negative, and for positive timeouts more than * about 13 days in the future (2^50ns). The correct fix is to trigger * an interrupt immediately (since Linux in fact has pending work to - * do in this situation). + * do in this situation). However, older guests also set a long timeout + * when they have *no* pending timers at all: setting an immediate + * timeout in this case can burn a lot of CPU. We therefore go for a + * reasonable middleground of triggering a timer event in 100ms. */ DPRINTK("Warning: huge timeout set by domain %d (vcpu %d):" " %"PRIx64"\n", v->domain->domain_id, v->vcpu_id, (uint64_t)timeout); - send_timer_event(v); + set_timer(&v->timer, NOW() + MILLISECS(100)); } else { diff -r 4e7318b0c1e0 -r 21918b22746e xen/include/asm-x86/config.h --- a/xen/include/asm-x86/config.h Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/include/asm-x86/config.h Wed Jul 26 10:49:32 2006 -0600 @@ -67,15 +67,13 @@ #ifndef NDEBUG #define MEMORY_GUARD -#ifdef __x86_64__ +#endif + #define STACK_ORDER 2 -#endif -#endif - -#ifndef STACK_ORDER -#define STACK_ORDER 1 -#endif #define STACK_SIZE (PAGE_SIZE << STACK_ORDER) + +/* Debug stack is restricted to 8kB by guard pages. */ +#define DEBUG_STACK_SIZE 8192 #define MAX_DMADOM_PFN 0x7FFFFUL /* 31 addressable bits */ diff -r 4e7318b0c1e0 -r 21918b22746e xen/include/xen/perfc_defn.h --- a/xen/include/xen/perfc_defn.h Wed Jul 26 09:41:24 2006 -0600 +++ b/xen/include/xen/perfc_defn.h Wed Jul 26 10:49:32 2006 -0600 @@ -2,154 +2,18 @@ /*#ifndef __XEN_PERFC_DEFN_H__*/ /*#define __XEN_PERFC_DEFN_H__*/ -#define PERFC_MAX_PT_UPDATES 64 -#define PERFC_PT_UPDATES_BUCKET_SIZE 3 -PERFCOUNTER_ARRAY(wpt_updates, "writable pt updates", - PERFC_MAX_PT_UPDATES) -PERFCOUNTER_ARRAY(bpt_updates, "batched pt updates", - PERFC_MAX_PT_UPDATES) -PERFCOUNTER_ARRAY(l1_entries_checked, "l1 entries checked", - PERFC_MAX_PT_UPDATES) -PERFCOUNTER_ARRAY(shm_l2_updates, "shadow mode L2 pt updates", - PERFC_MAX_PT_UPDATES) -PERFCOUNTER_ARRAY(shm_hl2_updates, "shadow mode HL2 pt updates", - PERFC_MAX_PT_UPDATES) -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) -PERFCOUNTER_ARRAY(shm_l3_updates, "shadow mode L3 pt updates", - PERFC_MAX_PT_UPDATES) -PERFCOUNTER_ARRAY(shm_l4_updates, "shadow mode L4 pt updates", - PERFC_MAX_PT_UPDATES) -#endif -PERFCOUNTER_ARRAY(snapshot_copies, "entries copied per snapshot", - PERFC_MAX_PT_UPDATES) +#include <asm/perfc_defn.h> PERFCOUNTER_ARRAY(hypercalls, "hypercalls", NR_hypercalls) -PERFCOUNTER_ARRAY(exceptions, "exceptions", 32) - -#define VMX_PERF_EXIT_REASON_SIZE 44 -#define VMX_PERF_VECTOR_SIZE 0x20 -PERFCOUNTER_ARRAY(vmexits, "vmexits", VMX_PERF_EXIT_REASON_SIZE) -PERFCOUNTER_ARRAY(cause_vector, "cause vector", VMX_PERF_VECTOR_SIZE) -#define SVM_PERF_EXIT_REASON_SIZE (1+136) -PERFCOUNTER_ARRAY(svmexits, "SVMexits", SVM_PERF_EXIT_REASON_SIZE) - -PERFCOUNTER_CPU(seg_fixups, "segmentation fixups") PERFCOUNTER_CPU(irqs, "#interrupts") PERFCOUNTER_CPU(ipis, "#IPIs") PERFCOUNTER_CPU(irq_time, "cycles spent in irq handler") -PERFCOUNTER_CPU(apic_timer, "apic timer interrupts") -PERFCOUNTER_CPU(timer_max, "timer max error (ns)") PERFCOUNTER_CPU(sched_irq, "sched: timer") PERFCOUNTER_CPU(sched_run, "sched: runs through scheduler") PERFCOUNTER_CPU(sched_ctx, "sched: context switches") -PERFCOUNTER_CPU(domain_page_tlb_flush, "domain page tlb flushes") PERFCOUNTER_CPU(need_flush_tlb_flush, "PG_need_flush tlb flushes") -PERFCOUNTER_CPU(calls_to_mmu_update, "calls_to_mmu_update") -PERFCOUNTER_CPU(num_page_updates, "num_page_updates") -PERFCOUNTER_CPU(calls_to_update_va, "calls_to_update_va_map") -PERFCOUNTER_CPU(page_faults, "page faults") -PERFCOUNTER_CPU(copy_user_faults, "copy_user faults") - -PERFCOUNTER_CPU(shadow_fault_calls, "calls to shadow_fault") -PERFCOUNTER_CPU(shadow_fault_bail_pde_not_present, - "sf bailed due to pde not present") -PERFCOUNTER_CPU(shadow_fault_bail_pte_not_present, - "sf bailed due to pte not present") -PERFCOUNTER_CPU(shadow_fault_bail_ro_mapping, - "sf bailed due to a ro mapping") -PERFCOUNTER_CPU(shadow_fault_fixed, "sf fixed the pgfault") -PERFCOUNTER_CPU(write_fault_bail, "sf bailed due to write_fault") -PERFCOUNTER_CPU(read_fault_bail, "sf bailed due to read_fault") - -PERFCOUNTER_CPU(map_domain_page_count, "map_domain_page count") -PERFCOUNTER_CPU(ptwr_emulations, "writable pt emulations") - -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) -PERFCOUNTER_CPU(shadow_l4_table_count, "shadow_l4_table count") -PERFCOUNTER_CPU(shadow_l3_table_count, "shadow_l3_table count") -#endif -PERFCOUNTER_CPU(shadow_l2_table_count, "shadow_l2_table count") -PERFCOUNTER_CPU(shadow_l1_table_count, "shadow_l1_table count") -PERFCOUNTER_CPU(unshadow_table_count, "unshadow_table count") -PERFCOUNTER_CPU(shadow_fixup_count, "shadow_fixup count") -PERFCOUNTER_CPU(shadow_update_va_fail1, "shadow_update_va_fail1") -PERFCOUNTER_CPU(shadow_update_va_fail2, "shadow_update_va_fail2") - -/* STATUS counters do not reset when 'P' is hit */ -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) -PERFSTATUS(shadow_l4_pages, "current # shadow L4 pages") -PERFSTATUS(shadow_l3_pages, "current # shadow L3 pages") -#endif -PERFSTATUS(shadow_l2_pages, "current # shadow L2 pages") -PERFSTATUS(shadow_l1_pages, "current # shadow L1 pages") -PERFSTATUS(hl2_table_pages, "current # hl2 pages") -PERFSTATUS(snapshot_pages, "current # fshadow snapshot pages") -PERFSTATUS(writable_pte_predictions, "# writable pte predictions") -PERFSTATUS(free_l1_pages, "current # free shadow L1 pages") - -PERFCOUNTER_CPU(check_pagetable, "calls to check_pagetable") -PERFCOUNTER_CPU(check_all_pagetables, "calls to check_all_pagetables") - -PERFCOUNTER_CPU(shadow_hl2_table_count, "shadow_hl2_table count") -PERFCOUNTER_CPU(shadow_set_l1e_force_map, "shadow_set_l1e forced to map l1") -PERFCOUNTER_CPU(shadow_set_l1e_unlinked, "shadow_set_l1e found unlinked l1") -PERFCOUNTER_CPU(shadow_set_l1e_fail, "shadow_set_l1e failed (no sl1)") -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) -PERFCOUNTER_CPU(shadow_set_l2e_force_map, "shadow_set_l2e forced to map l2") -PERFCOUNTER_CPU(shadow_set_l3e_force_map, "shadow_set_l3e forced to map l3") -#endif -PERFCOUNTER_CPU(shadow_invlpg_faults, "shadow_invlpg's get_user faulted") -PERFCOUNTER_CPU(unshadow_l2_count, "unpinned L2 count") - -PERFCOUNTER_CPU(shadow_status_shortcut, "fastpath miss on shadow cache") -PERFCOUNTER_CPU(shadow_status_calls, "calls to shadow_status") -PERFCOUNTER_CPU(shadow_status_miss, "missed shadow cache") -PERFCOUNTER_CPU(shadow_status_hit_head, "hits on head of bucket") -PERFCOUNTER_CPU(shadow_max_type, "calls to shadow_max_type") - -PERFCOUNTER_CPU(shadow_sync_all, "calls to shadow_sync_all") -PERFCOUNTER_CPU(shadow_sync_va, "calls to shadow_sync_va") -PERFCOUNTER_CPU(resync_l1, "resync L1 page") -PERFCOUNTER_CPU(resync_l2, "resync L2 page") -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) -PERFCOUNTER_CPU(resync_l3, "resync L3 page") -PERFCOUNTER_CPU(resync_l4, "resync L4 page") -#endif -PERFCOUNTER_CPU(resync_hl2, "resync HL2 page") -PERFCOUNTER_CPU(shadow_make_snapshot, "snapshots created") -PERFCOUNTER_CPU(shadow_mark_mfn_out_of_sync_calls, - "calls to shadow_mk_out_of_sync") -PERFCOUNTER_CPU(shadow_out_of_sync_calls, "calls to shadow_out_of_sync") -PERFCOUNTER_CPU(snapshot_entry_matches_calls, "calls to ss_entry_matches") -PERFCOUNTER_CPU(snapshot_entry_matches_true, "ss_entry_matches returns true") - -PERFCOUNTER_CPU(validate_pte_calls, "calls to validate_pte_change") -PERFCOUNTER_CPU(validate_pte_changes1, "validate_pte makes changes1") -PERFCOUNTER_CPU(validate_pte_changes2, "validate_pte makes changes2") -PERFCOUNTER_CPU(validate_pte_changes3, "validate_pte makes changes3") -PERFCOUNTER_CPU(validate_pte_changes4, "validate_pte makes changes4") -PERFCOUNTER_CPU(validate_pde_calls, "calls to validate_pde_change") -PERFCOUNTER_CPU(validate_pde_changes, "validate_pde makes changes") -PERFCOUNTER_CPU(shadow_get_page_fail, "shadow_get_page_from_l1e fails") -PERFCOUNTER_CPU(validate_hl2e_calls, "calls to validate_hl2e_change") -PERFCOUNTER_CPU(validate_hl2e_changes, "validate_hl2e makes changes") -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) -PERFCOUNTER_CPU(validate_entry_changes, "validate_entry changes") -#endif -PERFCOUNTER_CPU(exception_fixed, "pre-exception fixed") -PERFCOUNTER_CPU(get_mfn_from_gpfn_foreign, "calls to get_mfn_from_gpfn_foreign") -PERFCOUNTER_CPU(remove_all_access, "calls to remove_all_access") -PERFCOUNTER_CPU(remove_write_access, "calls to remove_write_access") -PERFCOUNTER_CPU(remove_write_access_easy, "easy outs of remove_write_access") -PERFCOUNTER_CPU(remove_write_no_work, "no work in remove_write_access") -PERFCOUNTER_CPU(remove_write_not_writable, "remove_write non-writable page") -PERFCOUNTER_CPU(remove_write_fast_exit, "remove_write hit predicted entry") -PERFCOUNTER_CPU(remove_write_predicted, "remove_write predict hit&exit") -PERFCOUNTER_CPU(remove_write_bad_prediction, "remove_write bad prediction") -PERFCOUNTER_CPU(update_hl2e_invlpg, "update_hl2e calls invlpg") - /*#endif*/ /* __XEN_PERFC_DEFN_H__ */ diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/ia64_intrinsic.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/tools/ioemu/ia64_intrinsic.h Wed Jul 26 10:49:32 2006 -0600 @@ -0,0 +1,276 @@ +#ifndef IA64_INTRINSIC_H +#define IA64_INTRINSIC_H + +/* + * Compiler-dependent Intrinsics + * + * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@xxxxxxxxx> + * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@xxxxxxxxx> + * + */ +extern long ia64_cmpxchg_called_with_bad_pointer (void); +extern void ia64_bad_param_for_getreg (void); +#define ia64_cmpxchg(sem,ptr,o,n,s) ({ \ + uint64_t _o, _r; \ + switch(s) { \ + case 1: _o = (uint8_t)(long)(o); break; \ + case 2: _o = (uint16_t)(long)(o); break; \ + case 4: _o = (uint32_t)(long)(o); break; \ + case 8: _o = (uint64_t)(long)(o); break; \ + default: break; \ + } \ + switch(s) { \ + case 1: \ + _r = ia64_cmpxchg1_##sem((uint8_t*)ptr,n,_o); break; \ + case 2: \ + _r = ia64_cmpxchg2_##sem((uint16_t*)ptr,n,_o); break; \ + case 4: \ + _r = ia64_cmpxchg4_##sem((uint32_t*)ptr,n,_o); break; \ + case 8: \ + _r = ia64_cmpxchg8_##sem((uint64_t*)ptr,n,_o); break; \ + default: \ + _r = ia64_cmpxchg_called_with_bad_pointer(); break; \ + } \ + (__typeof__(o)) _r; \ +}) + +#define cmpxchg_acq(ptr,o,n) ia64_cmpxchg(acq,ptr,o,n,sizeof(*ptr)) +#define cmpxchg_rel(ptr,o,n) ia64_cmpxchg(rel,ptr,o,n,sizeof(*ptr)) + +/* + * Register Names for getreg() and setreg(). + * + * The "magic" numbers happen to match the values used by the Intel compiler's + * getreg()/setreg() intrinsics. + */ + +/* Special Registers */ + +#define _IA64_REG_IP 1016 /* getreg only */ +#define _IA64_REG_PSR 1019 +#define _IA64_REG_PSR_L 1019 + +/* General Integer Registers */ + +#define _IA64_REG_GP 1025 /* R1 */ +#define _IA64_REG_R8 1032 /* R8 */ +#define _IA64_REG_R9 1033 /* R9 */ +#define _IA64_REG_SP 1036 /* R12 */ +#define _IA64_REG_TP 1037 /* R13 */ + +/* Application Registers */ + +#define _IA64_REG_AR_KR0 3072 +#define _IA64_REG_AR_KR1 3073 +#define _IA64_REG_AR_KR2 3074 +#define _IA64_REG_AR_KR3 3075 +#define _IA64_REG_AR_KR4 3076 +#define _IA64_REG_AR_KR5 3077 +#define _IA64_REG_AR_KR6 3078 +#define _IA64_REG_AR_KR7 3079 +#define _IA64_REG_AR_RSC 3088 +#define _IA64_REG_AR_BSP 3089 +#define _IA64_REG_AR_BSPSTORE 3090 +#define _IA64_REG_AR_RNAT 3091 +#define _IA64_REG_AR_FCR 3093 +#define _IA64_REG_AR_EFLAG 3096 +#define _IA64_REG_AR_CSD 3097 +#define _IA64_REG_AR_SSD 3098 +#define _IA64_REG_AR_CFLAG 3099 +#define _IA64_REG_AR_FSR 3100 +#define _IA64_REG_AR_FIR 3101 +#define _IA64_REG_AR_FDR 3102 +#define _IA64_REG_AR_CCV 3104 +#define _IA64_REG_AR_UNAT 3108 +#define _IA64_REG_AR_FPSR 3112 +#define _IA64_REG_AR_ITC 3116 +#define _IA64_REG_AR_PFS 3136 +#define _IA64_REG_AR_LC 3137 +#define _IA64_REG_AR_EC 3138 + +/* Control Registers */ + +#define _IA64_REG_CR_DCR 4096 +#define _IA64_REG_CR_ITM 4097 +#define _IA64_REG_CR_IVA 4098 +#define _IA64_REG_CR_PTA 4104 +#define _IA64_REG_CR_IPSR 4112 +#define _IA64_REG_CR_ISR 4113 +#define _IA64_REG_CR_IIP 4115 +#define _IA64_REG_CR_IFA 4116 +#define _IA64_REG_CR_ITIR 4117 +#define _IA64_REG_CR_IIPA 4118 +#define _IA64_REG_CR_IFS 4119 +#define _IA64_REG_CR_IIM 4120 +#define _IA64_REG_CR_IHA 4121 +#define _IA64_REG_CR_LID 4160 +#define _IA64_REG_CR_IVR 4161 /* getreg only */ +#define _IA64_REG_CR_TPR 4162 +#define _IA64_REG_CR_EOI 4163 +#define _IA64_REG_CR_IRR0 4164 /* getreg only */ +#define _IA64_REG_CR_IRR1 4165 /* getreg only */ +#define _IA64_REG_CR_IRR2 4166 /* getreg only */ +#define _IA64_REG_CR_IRR3 4167 /* getreg only */ +#define _IA64_REG_CR_ITV 4168 +#define _IA64_REG_CR_PMV 4169 +#define _IA64_REG_CR_CMCV 4170 +#define _IA64_REG_CR_LRR0 4176 +#define _IA64_REG_CR_LRR1 4177 + +/* Indirect Registers for getindreg() and setindreg() */ + +#define _IA64_REG_INDR_CPUID 9000 /* getindreg only */ +#define _IA64_REG_INDR_DBR 9001 +#define _IA64_REG_INDR_IBR 9002 +#define _IA64_REG_INDR_PKR 9003 +#define _IA64_REG_INDR_PMC 9004 +#define _IA64_REG_INDR_PMD 9005 +#define _IA64_REG_INDR_RR 9006 + +#ifdef __INTEL_COMPILER +void __fc(uint64_t *addr); +void __synci(void); +void __isrlz(void); +void __dsrlz(void); +uint64_t __getReg(const int whichReg); +uint64_t _InterlockedCompareExchange8_rel(volatile uint8_t *dest, uint64_t xchg, uint64_t comp); +uint64_t _InterlockedCompareExchange8_acq(volatile uint8_t *dest, uint64_t xchg, uint64_t comp); +uint64_t _InterlockedCompareExchange16_rel(volatile uint16_t *dest, uint64_t xchg, uint64_t comp); +uint64_t _InterlockedCompareExchange16_acq(volatile uint16_t *dest, uint64_t xchg, uint64_t comp); +uint64_t _InterlockedCompareExchange_rel(volatile uint32_t *dest, uint64_t xchg, uint64_t comp); +uint64_t _InterlockedCompareExchange_acq(volatile uint32_t *dest, uint64_t xchg, uint64_t comp); +uint64_t _InterlockedCompareExchange64_rel(volatile uint64_t *dest, uint64_t xchg, uint64_t comp); +u64_t _InterlockedCompareExchange64_acq(volatile uint64_t *dest, uint64_t xchg, uint64_t comp); + +#define ia64_cmpxchg1_rel _InterlockedCompareExchange8_rel +#define ia64_cmpxchg1_acq _InterlockedCompareExchange8_acq +#define ia64_cmpxchg2_rel _InterlockedCompareExchange16_rel +#define ia64_cmpxchg2_acq _InterlockedCompareExchange16_acq +#define ia64_cmpxchg4_rel _InterlockedCompareExchange_rel +#define ia64_cmpxchg4_acq _InterlockedCompareExchange_acq +#define ia64_cmpxchg8_rel _InterlockedCompareExchange64_rel +#define ia64_cmpxchg8_acq _InterlockedCompareExchange64_acq + +#define ia64_srlz_d __dsrlz +#define ia64_srlz_i __isrlz +#define __ia64_fc __fc +#define ia64_sync_i __synci +#define __ia64_getreg __getReg +#else /* __INTEL_COMPILER */ +#define ia64_cmpxchg1_acq(ptr, new, old) \ +({ \ + uint64_t ia64_intri_res; \ + asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ + asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \ + "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ + ia64_intri_res; \ +}) + +#define ia64_cmpxchg1_rel(ptr, new, old) \ +({ \ + uint64_t ia64_intri_res; \ + asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ + asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \ + "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ + ia64_intri_res; \ +}) + +#define ia64_cmpxchg2_acq(ptr, new, old) \ +({ \ + uint64_t ia64_intri_res; \ + asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ + asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \ + "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ + ia64_intri_res; \ +}) + +#define ia64_cmpxchg2_rel(ptr, new, old) \ +({ \ + uint64_t ia64_intri_res; \ + asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ + \ + asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \ + "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ + ia64_intri_res; \ +}) + +#define ia64_cmpxchg4_acq(ptr, new, old) \ +({ \ + uint64_t ia64_intri_res; \ + asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ + asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \ + "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ + ia64_intri_res; \ +}) + +#define ia64_cmpxchg4_rel(ptr, new, old) \ +({ \ + uint64_t ia64_intri_res; \ + asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ + asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \ + "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ + ia64_intri_res; \ +}) + +#define ia64_cmpxchg8_acq(ptr, new, old) \ +({ \ + uint64_t ia64_intri_res; \ + asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ + asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \ + "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ + ia64_intri_res; \ +}) + +#define ia64_cmpxchg8_rel(ptr, new, old) \ +({ \ + uint64_t ia64_intri_res; \ + asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ + \ + asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \ + "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ + ia64_intri_res; \ +}) + +#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory") +#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory"); +#define __ia64_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory") +#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory") + +register unsigned long ia64_r13 asm ("r13") __attribute_used__; +#define __ia64_getreg(regnum) \ +({ \ + uint64_t ia64_intri_res; \ + \ + switch (regnum) { \ + case _IA64_REG_GP: \ + asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \ + break; \ + case _IA64_REG_IP: \ + asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \ + break; \ + case _IA64_REG_PSR: \ + asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \ + break; \ + case _IA64_REG_TP: /* for current() */ \ + ia64_intri_res = ia64_r13; \ + break; \ + case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \ + asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \ + : "i"(regnum - _IA64_REG_AR_KR0)); \ + break; \ + case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \ + asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \ + : "i" (regnum - _IA64_REG_CR_DCR)); \ + break; \ + case _IA64_REG_SP: \ + asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \ + break; \ + default: \ + ia64_bad_param_for_getreg(); \ + break; \ + } \ + ia64_intri_res; \ +}) + +#endif /* __INTEL_COMPILER */ +#endif /* IA64_INTRINSIC_H */ diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/ioemu-ia64 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/tools/ioemu/patches/ioemu-ia64 Wed Jul 26 10:49:32 2006 -0600 @@ -0,0 +1,471 @@ +Index: ioemu/hw/iommu.c +=================================================================== +--- ioemu.orig/hw/iommu.c 2006-07-14 13:43:45.000000000 +0100 ++++ ioemu/hw/iommu.c 2006-07-26 13:34:50.039997837 +0100 +@@ -82,7 +82,11 @@ + #define IOPTE_VALID 0x00000002 /* IOPTE is valid */ + #define IOPTE_WAZ 0x00000001 /* Write as zeros */ + ++#if defined(__i386__) || defined(__x86_64__) + #define PAGE_SHIFT 12 ++#elif defined(__ia64__) ++#define PAGE_SHIFT 14 ++#endif + #define PAGE_SIZE (1 << PAGE_SHIFT) + #define PAGE_MASK (PAGE_SIZE - 1) + +Index: ioemu/cpu-all.h +=================================================================== +--- ioemu.orig/cpu-all.h 2006-07-26 13:33:45.946834283 +0100 ++++ ioemu/cpu-all.h 2006-07-26 13:34:50.038997944 +0100 +@@ -835,6 +835,31 @@ + :"=m" (*(volatile long *)addr) + :"dIr" (nr)); + } ++#elif defined(__ia64__) ++#include "ia64_intrinsic.h" ++#define atomic_set_bit(nr, addr) ({ \ ++ typeof(*addr) bit, old, new; \ ++ volatile typeof(*addr) *m; \ ++ \ ++ m = (volatile typeof(*addr)*)(addr + nr / (8*sizeof(*addr))); \ ++ bit = 1 << (nr % (8*sizeof(*addr))); \ ++ do { \ ++ old = *m; \ ++ new = old | bit; \ ++ } while (cmpxchg_acq(m, old, new) != old); \ ++}) ++ ++#define atomic_clear_bit(nr, addr) ({ \ ++ typeof(*addr) bit, old, new; \ ++ volatile typeof(*addr) *m; \ ++ \ ++ m = (volatile typeof(*addr)*)(addr + nr / (8*sizeof(*addr))); \ ++ bit = ~(1 << (nr % (8*sizeof(*addr)))); \ ++ do { \ ++ old = *m; \ ++ new = old & bit; \ ++ } while (cmpxchg_acq(m, old, new) != old); \ ++}) + #endif + + /* memory API */ +Index: ioemu/vl.c +=================================================================== +--- ioemu.orig/vl.c 2006-07-26 13:33:45.996828953 +0100 ++++ ioemu/vl.c 2006-07-26 13:34:50.044997304 +0100 +@@ -5577,6 +5577,7 @@ + exit(-1); + } + ++#if defined(__i386__) || defined(__x86_64__) + if (xc_get_pfn_list(xc_handle, domid, page_array, nr_pages) != nr_pages) { + fprintf(logfile, "xc_get_pfn_list returned error %d\n", errno); + exit(-1); +@@ -5597,6 +5598,34 @@ + fprintf(logfile, "shared page at pfn:%lx, mfn: %"PRIx64"\n", nr_pages - 1, + (uint64_t)(page_array[nr_pages - 1])); + ++#elif defined(__ia64__) ++ if (xc_ia64_get_pfn_list(xc_handle, domid, ++ page_array, 0, nr_pages) != nr_pages) { ++ fprintf(logfile, "xc_ia64_get_pfn_list returned error %d\n", errno); ++ exit(-1); ++ } ++ ++ phys_ram_base = xc_map_foreign_batch(xc_handle, domid, ++ PROT_READ|PROT_WRITE, ++ page_array, nr_pages); ++ if (phys_ram_base == 0) { ++ fprintf(logfile, "xc_map_foreign_batch returned error %d\n", errno); ++ exit(-1); ++ } ++ ++ if (xc_ia64_get_pfn_list(xc_handle, domid, page_array, ++ nr_pages + (GFW_SIZE >> PAGE_SHIFT), 1)!= 1){ ++ fprintf(logfile, "xc_ia64_get_pfn_list returned error %d\n", errno); ++ exit(-1); ++ } ++ ++ shared_page = xc_map_foreign_range(xc_handle, domid, PAGE_SIZE, ++ PROT_READ|PROT_WRITE, ++ page_array[0]); ++ ++ fprintf(logfile, "shared page at pfn:%lx, mfn: %l016x\n", ++ IO_PAGE_START >> PAGE_SHIFT, page_array[0]); ++#endif + #else /* !CONFIG_DM */ + + #ifdef CONFIG_SOFTMMU +Index: ioemu/target-i386-dm/exec-dm.c +=================================================================== +--- ioemu.orig/target-i386-dm/exec-dm.c 2006-07-26 13:33:45.882841107 +0100 ++++ ioemu/target-i386-dm/exec-dm.c 2006-07-26 13:34:50.040997731 +0100 +@@ -340,6 +340,23 @@ + return io_mem_read[io_index >> IO_MEM_SHIFT]; + } + ++#ifdef __ia64__ ++/* IA64 has seperate I/D cache, with coherence maintained by DMA controller. ++ * So to emulate right behavior that guest OS is assumed, we need to flush ++ * I/D cache here. ++ */ ++static void sync_icache(unsigned long address, int len) ++{ ++ int l; ++ ++ for(l = 0; l < (len + 32); l += 32) ++ __ia64_fc(address + l); ++ ++ ia64_sync_i(); ++ ia64_srlz_i(); ++} ++#endif ++ + /* physical memory access (slow version, mainly for debug) */ + #if defined(CONFIG_USER_ONLY) + void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, +@@ -455,6 +472,9 @@ + ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) + + (addr & ~TARGET_PAGE_MASK); + memcpy(buf, ptr, l); ++#ifdef __ia64__ ++ sync_icache((unsigned long)ptr, l); ++#endif + } + } + len -= l; +Index: ioemu/exec-all.h +=================================================================== +--- ioemu.orig/exec-all.h 2006-07-26 13:33:45.861843346 +0100 ++++ ioemu/exec-all.h 2006-07-26 13:38:30.096491388 +0100 +@@ -391,6 +391,15 @@ + } + #endif + ++#ifdef __ia64__ ++#include "ia64_intrinsic.h" ++static inline int testandset (int *p) ++{ ++ uint32_t o = 0, n = 1; ++ return (int)cmpxchg_acq(p, o, n); ++} ++#endif ++ + #ifdef __s390__ + static inline int testandset (int *p) + { +@@ -462,12 +471,13 @@ + } + #endif + +-#ifdef __ia64 +-#include <ia64intrin.h> ++#ifdef __ia64__ ++#include "ia64_intrinsic.h" + + static inline int testandset (int *p) + { +- return __sync_lock_test_and_set (p, 1); ++ uint32_t o = 0, n = 1; ++ return (int)cmpxchg_acq(p, o, n); + } + #endif + +Index: ioemu/target-i386-dm/cpu.h +=================================================================== +--- ioemu.orig/target-i386-dm/cpu.h 2006-07-26 13:33:45.882841107 +0100 ++++ ioemu/target-i386-dm/cpu.h 2006-07-26 13:34:50.040997731 +0100 +@@ -80,7 +80,11 @@ + /* helper2.c */ + int main_loop(void); + ++#if defined(__i386__) || defined(__x86_64__) + #define TARGET_PAGE_BITS 12 ++#elif defined(__ia64__) ++#define TARGET_PAGE_BITS 14 ++#endif + #include "cpu-all.h" + + #endif /* CPU_I386_H */ +Index: ioemu/ia64_intrinsic.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ ioemu/ia64_intrinsic.h 2006-07-26 13:34:50.038997944 +0100 +@@ -0,0 +1,276 @@ ++#ifndef IA64_INTRINSIC_H ++#define IA64_INTRINSIC_H ++ ++/* ++ * Compiler-dependent Intrinsics ++ * ++ * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@xxxxxxxxx> ++ * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@xxxxxxxxx> ++ * ++ */ ++extern long ia64_cmpxchg_called_with_bad_pointer (void); ++extern void ia64_bad_param_for_getreg (void); ++#define ia64_cmpxchg(sem,ptr,o,n,s) ({ \ ++ uint64_t _o, _r; \ ++ switch(s) { \ ++ case 1: _o = (uint8_t)(long)(o); break; \ ++ case 2: _o = (uint16_t)(long)(o); break; \ ++ case 4: _o = (uint32_t)(long)(o); break; \ ++ case 8: _o = (uint64_t)(long)(o); break; \ ++ default: break; \ ++ } \ ++ switch(s) { \ ++ case 1: \ ++ _r = ia64_cmpxchg1_##sem((uint8_t*)ptr,n,_o); break; \ ++ case 2: \ ++ _r = ia64_cmpxchg2_##sem((uint16_t*)ptr,n,_o); break; \ ++ case 4: \ ++ _r = ia64_cmpxchg4_##sem((uint32_t*)ptr,n,_o); break; \ ++ case 8: \ ++ _r = ia64_cmpxchg8_##sem((uint64_t*)ptr,n,_o); break; \ ++ default: \ ++ _r = ia64_cmpxchg_called_with_bad_pointer(); break; \ ++ } \ ++ (__typeof__(o)) _r; \ ++}) ++ ++#define cmpxchg_acq(ptr,o,n) ia64_cmpxchg(acq,ptr,o,n,sizeof(*ptr)) ++#define cmpxchg_rel(ptr,o,n) ia64_cmpxchg(rel,ptr,o,n,sizeof(*ptr)) ++ ++/* ++ * Register Names for getreg() and setreg(). ++ * ++ * The "magic" numbers happen to match the values used by the Intel compiler's ++ * getreg()/setreg() intrinsics. ++ */ ++ ++/* Special Registers */ ++ ++#define _IA64_REG_IP 1016 /* getreg only */ ++#define _IA64_REG_PSR 1019 ++#define _IA64_REG_PSR_L 1019 ++ ++/* General Integer Registers */ ++ ++#define _IA64_REG_GP 1025 /* R1 */ ++#define _IA64_REG_R8 1032 /* R8 */ ++#define _IA64_REG_R9 1033 /* R9 */ ++#define _IA64_REG_SP 1036 /* R12 */ ++#define _IA64_REG_TP 1037 /* R13 */ ++ ++/* Application Registers */ ++ ++#define _IA64_REG_AR_KR0 3072 ++#define _IA64_REG_AR_KR1 3073 ++#define _IA64_REG_AR_KR2 3074 ++#define _IA64_REG_AR_KR3 3075 ++#define _IA64_REG_AR_KR4 3076 ++#define _IA64_REG_AR_KR5 3077 ++#define _IA64_REG_AR_KR6 3078 ++#define _IA64_REG_AR_KR7 3079 ++#define _IA64_REG_AR_RSC 3088 ++#define _IA64_REG_AR_BSP 3089 ++#define _IA64_REG_AR_BSPSTORE 3090 ++#define _IA64_REG_AR_RNAT 3091 ++#define _IA64_REG_AR_FCR 3093 ++#define _IA64_REG_AR_EFLAG 3096 ++#define _IA64_REG_AR_CSD 3097 ++#define _IA64_REG_AR_SSD 3098 ++#define _IA64_REG_AR_CFLAG 3099 ++#define _IA64_REG_AR_FSR 3100 ++#define _IA64_REG_AR_FIR 3101 ++#define _IA64_REG_AR_FDR 3102 ++#define _IA64_REG_AR_CCV 3104 ++#define _IA64_REG_AR_UNAT 3108 ++#define _IA64_REG_AR_FPSR 3112 ++#define _IA64_REG_AR_ITC 3116 ++#define _IA64_REG_AR_PFS 3136 ++#define _IA64_REG_AR_LC 3137 ++#define _IA64_REG_AR_EC 3138 ++ ++/* Control Registers */ ++ ++#define _IA64_REG_CR_DCR 4096 ++#define _IA64_REG_CR_ITM 4097 ++#define _IA64_REG_CR_IVA 4098 ++#define _IA64_REG_CR_PTA 4104 ++#define _IA64_REG_CR_IPSR 4112 ++#define _IA64_REG_CR_ISR 4113 ++#define _IA64_REG_CR_IIP 4115 ++#define _IA64_REG_CR_IFA 4116 ++#define _IA64_REG_CR_ITIR 4117 ++#define _IA64_REG_CR_IIPA 4118 ++#define _IA64_REG_CR_IFS 4119 ++#define _IA64_REG_CR_IIM 4120 ++#define _IA64_REG_CR_IHA 4121 ++#define _IA64_REG_CR_LID 4160 ++#define _IA64_REG_CR_IVR 4161 /* getreg only */ ++#define _IA64_REG_CR_TPR 4162 ++#define _IA64_REG_CR_EOI 4163 ++#define _IA64_REG_CR_IRR0 4164 /* getreg only */ ++#define _IA64_REG_CR_IRR1 4165 /* getreg only */ ++#define _IA64_REG_CR_IRR2 4166 /* getreg only */ ++#define _IA64_REG_CR_IRR3 4167 /* getreg only */ ++#define _IA64_REG_CR_ITV 4168 ++#define _IA64_REG_CR_PMV 4169 ++#define _IA64_REG_CR_CMCV 4170 ++#define _IA64_REG_CR_LRR0 4176 ++#define _IA64_REG_CR_LRR1 4177 ++ ++/* Indirect Registers for getindreg() and setindreg() */ ++ ++#define _IA64_REG_INDR_CPUID 9000 /* getindreg only */ ++#define _IA64_REG_INDR_DBR 9001 ++#define _IA64_REG_INDR_IBR 9002 ++#define _IA64_REG_INDR_PKR 9003 ++#define _IA64_REG_INDR_PMC 9004 ++#define _IA64_REG_INDR_PMD 9005 ++#define _IA64_REG_INDR_RR 9006 ++ ++#ifdef __INTEL_COMPILER ++void __fc(uint64_t *addr); ++void __synci(void); ++void __isrlz(void); ++void __dsrlz(void); ++uint64_t __getReg(const int whichReg); ++uint64_t _InterlockedCompareExchange8_rel(volatile uint8_t *dest, uint64_t xchg, uint64_t comp); ++uint64_t _InterlockedCompareExchange8_acq(volatile uint8_t *dest, uint64_t xchg, uint64_t comp); ++uint64_t _InterlockedCompareExchange16_rel(volatile uint16_t *dest, uint64_t xchg, uint64_t comp); ++uint64_t _InterlockedCompareExchange16_acq(volatile uint16_t *dest, uint64_t xchg, uint64_t comp); ++uint64_t _InterlockedCompareExchange_rel(volatile uint32_t *dest, uint64_t xchg, uint64_t comp); ++uint64_t _InterlockedCompareExchange_acq(volatile uint32_t *dest, uint64_t xchg, uint64_t comp); ++uint64_t _InterlockedCompareExchange64_rel(volatile uint64_t *dest, uint64_t xchg, uint64_t comp); ++u64_t _InterlockedCompareExchange64_acq(volatile uint64_t *dest, uint64_t xchg, uint64_t comp); ++ ++#define ia64_cmpxchg1_rel _InterlockedCompareExchange8_rel ++#define ia64_cmpxchg1_acq _InterlockedCompareExchange8_acq ++#define ia64_cmpxchg2_rel _InterlockedCompareExchange16_rel ++#define ia64_cmpxchg2_acq _InterlockedCompareExchange16_acq ++#define ia64_cmpxchg4_rel _InterlockedCompareExchange_rel ++#define ia64_cmpxchg4_acq _InterlockedCompareExchange_acq ++#define ia64_cmpxchg8_rel _InterlockedCompareExchange64_rel ++#define ia64_cmpxchg8_acq _InterlockedCompareExchange64_acq ++ ++#define ia64_srlz_d __dsrlz ++#define ia64_srlz_i __isrlz ++#define __ia64_fc __fc ++#define ia64_sync_i __synci ++#define __ia64_getreg __getReg ++#else /* __INTEL_COMPILER */ ++#define ia64_cmpxchg1_acq(ptr, new, old) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ ++ asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \ ++ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ++ ia64_intri_res; \ ++}) ++ ++#define ia64_cmpxchg1_rel(ptr, new, old) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ ++ asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \ ++ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ++ ia64_intri_res; \ ++}) ++ ++#define ia64_cmpxchg2_acq(ptr, new, old) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ ++ asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \ ++ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ++ ia64_intri_res; \ ++}) ++ ++#define ia64_cmpxchg2_rel(ptr, new, old) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ ++ \ ++ asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \ ++ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ++ ia64_intri_res; \ ++}) ++ ++#define ia64_cmpxchg4_acq(ptr, new, old) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ ++ asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \ ++ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ++ ia64_intri_res; \ ++}) ++ ++#define ia64_cmpxchg4_rel(ptr, new, old) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ ++ asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \ ++ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ++ ia64_intri_res; \ ++}) ++ ++#define ia64_cmpxchg8_acq(ptr, new, old) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ ++ asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \ ++ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ++ ia64_intri_res; \ ++}) ++ ++#define ia64_cmpxchg8_rel(ptr, new, old) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ ++ \ ++ asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \ ++ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ ++ ia64_intri_res; \ ++}) ++ ++#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory") ++#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory"); ++#define __ia64_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory") ++#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory") ++ ++register unsigned long ia64_r13 asm ("r13") __attribute_used__; ++#define __ia64_getreg(regnum) \ ++({ \ ++ uint64_t ia64_intri_res; \ ++ \ ++ switch (regnum) { \ ++ case _IA64_REG_GP: \ ++ asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \ ++ break; \ ++ case _IA64_REG_IP: \ ++ asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \ ++ break; \ ++ case _IA64_REG_PSR: \ ++ asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \ ++ break; \ ++ case _IA64_REG_TP: /* for current() */ \ ++ ia64_intri_res = ia64_r13; \ ++ break; \ ++ case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \ ++ asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \ ++ : "i"(regnum - _IA64_REG_AR_KR0)); \ ++ break; \ ++ case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \ ++ asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \ ++ : "i" (regnum - _IA64_REG_CR_DCR)); \ ++ break; \ ++ case _IA64_REG_SP: \ ++ asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \ ++ break; \ ++ default: \ ++ ia64_bad_param_for_getreg(); \ ++ break; \ ++ } \ ++ ia64_intri_res; \ ++}) ++ ++#endif /* __INTEL_COMPILER */ ++#endif /* IA64_INTRINSIC_H */ diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/qemu-init-vgabios --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/tools/ioemu/patches/qemu-init-vgabios Wed Jul 26 10:49:32 2006 -0600 @@ -0,0 +1,141 @@ +Index: ioemu/hw/vga.c +=================================================================== +--- ioemu.orig/hw/vga.c 2006-07-26 15:16:41.955609165 +0100 ++++ ioemu/hw/vga.c 2006-07-26 15:17:16.910802283 +0100 +@@ -1669,6 +1669,136 @@ + } + } + ++/* do the same job as vgabios before vgabios get ready - yeah */ ++void vga_bios_init(VGAState *s) ++{ ++ uint8_t palette_model[192] = { ++ 0, 0, 0, 0, 0, 170, 0, 170, ++ 0, 0, 170, 170, 170, 0, 0, 170, ++ 0, 170, 170, 85, 0, 170, 170, 170, ++ 85, 85, 85, 85, 85, 255, 85, 255, ++ 85, 85, 255, 255, 255, 85, 85, 255, ++ 85, 255, 255, 255, 85, 255, 255, 255, ++ 0, 21, 0, 0, 21, 42, 0, 63, ++ 0, 0, 63, 42, 42, 21, 0, 42, ++ 21, 42, 42, 63, 0, 42, 63, 42, ++ 0, 21, 21, 0, 21, 63, 0, 63, ++ 21, 0, 63, 63, 42, 21, 21, 42, ++ 21, 63, 42, 63, 21, 42, 63, 63, ++ 21, 0, 0, 21, 0, 42, 21, 42, ++ 0, 21, 42, 42, 63, 0, 0, 63, ++ 0, 42, 63, 42, 0, 63, 42, 42, ++ 21, 0, 21, 21, 0, 63, 21, 42, ++ 21, 21, 42, 63, 63, 0, 21, 63, ++ 0, 63, 63, 42, 21, 63, 42, 63, ++ 21, 21, 0, 21, 21, 42, 21, 63, ++ 0, 21, 63, 42, 63, 21, 0, 63, ++ 21, 42, 63, 63, 0, 63, 63, 42, ++ 21, 21, 21, 21, 21, 63, 21, 63, ++ 21, 21, 63, 63, 63, 21, 21, 63, ++ 21, 63, 63, 63, 21, 63, 63, 63 ++ }; ++ ++ s->latch = 0; ++ ++ s->sr_index = 3; ++ s->sr[0] = 3; ++ s->sr[1] = 0; ++ s->sr[2] = 3; ++ s->sr[3] = 0; ++ s->sr[4] = 2; ++ s->sr[5] = 0; ++ s->sr[6] = 0; ++ s->sr[7] = 0; ++ ++ s->gr_index = 5; ++ s->gr[0] = 0; ++ s->gr[1] = 0; ++ s->gr[2] = 0; ++ s->gr[3] = 0; ++ s->gr[4] = 0; ++ s->gr[5] = 16; ++ s->gr[6] = 14; ++ s->gr[7] = 15; ++ s->gr[8] = 255; ++ ++ /* changed by out 0x03c0 */ ++ s->ar_index = 32; ++ s->ar[0] = 0; ++ s->ar[1] = 1; ++ s->ar[2] = 2; ++ s->ar[3] = 3; ++ s->ar[4] = 4; ++ s->ar[5] = 5; ++ s->ar[6] = 6; ++ s->ar[7] = 7; ++ s->ar[8] = 8; ++ s->ar[9] = 9; ++ s->ar[10] = 10; ++ s->ar[11] = 11; ++ s->ar[12] = 12; ++ s->ar[13] = 13; ++ s->ar[14] = 14; ++ s->ar[15] = 15; ++ s->ar[16] = 12; ++ s->ar[17] = 0; ++ s->ar[18] = 15; ++ s->ar[19] = 8; ++ s->ar[20] = 0; ++ ++ s->ar_flip_flop = 1; ++ ++ s->cr_index = 15; ++ s->cr[0] = 95; ++ s->cr[1] = 79; ++ s->cr[2] = 80; ++ s->cr[3] = 130; ++ s->cr[4] = 85; ++ s->cr[5] = 129; ++ s->cr[6] = 191; ++ s->cr[7] = 31; ++ s->cr[8] = 0; ++ s->cr[9] = 79; ++ s->cr[10] = 14; ++ s->cr[11] = 15; ++ s->cr[12] = 0; ++ s->cr[13] = 0; ++ s->cr[14] = 5; ++ s->cr[15] = 160; ++ s->cr[16] = 156; ++ s->cr[17] = 142; ++ s->cr[18] = 143; ++ s->cr[19] = 40; ++ s->cr[20] = 31; ++ s->cr[21] = 150; ++ s->cr[22] = 185; ++ s->cr[23] = 163; ++ s->cr[24] = 255; ++ ++ s->msr = 103; ++ s->fcr = 0; ++ s->st00 = 0; ++ s->st01 = 0; ++ ++ /* dac_* & palette will be initialized by os through out 0x03c8 & ++ * out 0c03c9(1:3) */ ++ s->dac_state = 0; ++ s->dac_sub_index = 0; ++ s->dac_read_index = 0; ++ s->dac_write_index = 16; ++ s->dac_cache[0] = 255; ++ s->dac_cache[1] = 255; ++ s->dac_cache[2] = 255; ++ ++ /* palette */ ++ memcpy(s->palette, palette_model, 192); ++ ++ s->bank_offset = 0; ++ s->graphic_mode = -1; ++ ++ /* TODO: add vbe support if enabled */ ++} ++ + void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, + unsigned long vga_ram_offset, int vga_ram_size) + { diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/vnc-access-monitor-vt --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/tools/ioemu/patches/vnc-access-monitor-vt Wed Jul 26 10:49:32 2006 -0600 @@ -0,0 +1,112 @@ +Index: ioemu/vnc.c +=================================================================== +--- ioemu.orig/vnc.c 2006-07-26 14:33:57.906165040 +0100 ++++ ioemu/vnc.c 2006-07-26 14:44:09.972552689 +0100 +@@ -32,6 +32,10 @@ + #include "vnc_keysym.h" + #include "keymaps.c" + ++#define XK_MISCELLANY ++#define XK_LATIN1 ++#include <X11/keysymdef.h> ++ + typedef struct Buffer + { + size_t capacity; +@@ -64,6 +68,7 @@ + Buffer output; + Buffer input; + kbd_layout_t *kbd_layout; ++ int ctl_keys; /* Ctrl+Alt starts calibration */ + + VncReadEvent *read_handler; + size_t read_handler_expect; +@@ -679,16 +684,80 @@ + + static void do_key_event(VncState *vs, int down, uint32_t sym) + { +- int keycode; ++ sym &= 0xFFFF; + +- keycode = keysym2scancode(vs->kbd_layout, sym & 0xFFFF); ++ if (is_graphic_console()) { ++ int keycode; + +- if (keycode & 0x80) +- kbd_put_keycode(0xe0); +- if (down) +- kbd_put_keycode(keycode & 0x7f); +- else +- kbd_put_keycode(keycode | 0x80); ++ keycode = keysym2scancode(vs->kbd_layout, sym); ++ if (keycode & 0x80) ++ kbd_put_keycode(0xe0); ++ if (down) ++ kbd_put_keycode(keycode & 0x7f); ++ else ++ kbd_put_keycode(keycode | 0x80); ++ } else if (down) { ++ int qemu_keysym = 0; ++ ++ if (sym <= 128) /* normal ascii */ ++ qemu_keysym = sym; ++ else { ++ switch (sym) { ++ case XK_Up: qemu_keysym = QEMU_KEY_UP; break; ++ case XK_Down: qemu_keysym = QEMU_KEY_DOWN; break; ++ case XK_Left: qemu_keysym = QEMU_KEY_LEFT; break; ++ case XK_Right: qemu_keysym = QEMU_KEY_RIGHT; break; ++ case XK_Home: qemu_keysym = QEMU_KEY_HOME; break; ++ case XK_End: qemu_keysym = QEMU_KEY_END; break; ++ case XK_Page_Up: qemu_keysym = QEMU_KEY_PAGEUP; break; ++ case XK_Page_Down: qemu_keysym = QEMU_KEY_PAGEDOWN; break; ++ case XK_BackSpace: qemu_keysym = QEMU_KEY_BACKSPACE; break; ++ case XK_Delete: qemu_keysym = QEMU_KEY_DELETE; break; ++ case XK_Return: ++ case XK_Linefeed: qemu_keysym = sym; break; ++ default: break; ++ } ++ } ++ if (qemu_keysym != 0) ++ kbd_put_keysym(qemu_keysym); ++ } ++ ++ if (down) { ++ switch (sym) { ++ case XK_Control_L: ++ vs->ctl_keys |= 1; ++ break; ++ ++ case XK_Alt_L: ++ vs->ctl_keys |= 2; ++ break; ++ ++ default: ++ break; ++ } ++ } else { ++ switch (sym) { ++ case XK_Control_L: ++ vs->ctl_keys &= ~1; ++ break; ++ ++ case XK_Alt_L: ++ vs->ctl_keys &= ~2; ++ break; ++ ++ case XK_1 ... XK_9: ++ if ((vs->ctl_keys & 3) != 3) ++ break; ++ ++ console_select(sym - XK_1); ++ if (is_graphic_console()) { ++ /* tell the vga console to redisplay itself */ ++ vga_hw_invalidate(); ++ vnc_dpy_update(vs->ds, 0, 0, vs->ds->width, vs->ds->height); ++ } ++ break; ++ } ++ } + } + + static void key_event(VncState *vs, int down, uint32_t sym) diff -r 4e7318b0c1e0 -r 21918b22746e tools/ioemu/patches/vnc-title-domain-name --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/tools/ioemu/patches/vnc-title-domain-name Wed Jul 26 10:49:32 2006 -0600 @@ -0,0 +1,25 @@ +Index: ioemu/vnc.c +=================================================================== +--- ioemu.orig/vnc.c 2006-07-26 14:23:52.426074956 +0100 ++++ ioemu/vnc.c 2006-07-26 14:24:15.210558295 +0100 +@@ -850,6 +850,7 @@ + + static int protocol_client_init(VncState *vs, char *data, size_t len) + { ++ size_t l; + char pad[3] = { 0, 0, 0 }; + + vs->width = vs->ds->width; +@@ -886,8 +887,10 @@ + + vnc_write(vs, pad, 3); /* padding */ + +- vnc_write_u32(vs, 4); +- vnc_write(vs, "QEMU", 4); ++ l = strlen(domain_name); ++ vnc_write_u32(vs, l); ++ vnc_write(vs, domain_name, l); ++ + vnc_flush(vs); + + vnc_read_when(vs, protocol_client_msg, 1); diff -r 4e7318b0c1e0 -r 21918b22746e xen/include/asm-ia64/perfc_defn.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/include/asm-ia64/perfc_defn.h Wed Jul 26 10:49:32 2006 -0600 @@ -0,0 +1,1 @@ +/* This file is empty. */ diff -r 4e7318b0c1e0 -r 21918b22746e xen/include/asm-x86/perfc_defn.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/xen/include/asm-x86/perfc_defn.h Wed Jul 26 10:49:32 2006 -0600 @@ -0,0 +1,147 @@ +/* This file is legitimately included multiple times. */ +/*#ifndef __XEN_PERFC_DEFN_H__*/ +/*#define __XEN_PERFC_DEFN_H__*/ + +#define PERFC_MAX_PT_UPDATES 64 +#define PERFC_PT_UPDATES_BUCKET_SIZE 3 +PERFCOUNTER_ARRAY(wpt_updates, "writable pt updates", + PERFC_MAX_PT_UPDATES) +PERFCOUNTER_ARRAY(bpt_updates, "batched pt updates", + PERFC_MAX_PT_UPDATES) +PERFCOUNTER_ARRAY(l1_entries_checked, "l1 entries checked", + PERFC_MAX_PT_UPDATES) +PERFCOUNTER_ARRAY(shm_l2_updates, "shadow mode L2 pt updates", + PERFC_MAX_PT_UPDATES) +PERFCOUNTER_ARRAY(shm_hl2_updates, "shadow mode HL2 pt updates", + PERFC_MAX_PT_UPDATES) +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) +PERFCOUNTER_ARRAY(shm_l3_updates, "shadow mode L3 pt updates", + PERFC_MAX_PT_UPDATES) +PERFCOUNTER_ARRAY(shm_l4_updates, "shadow mode L4 pt updates", + PERFC_MAX_PT_UPDATES) +#endif +PERFCOUNTER_ARRAY(snapshot_copies, "entries copied per snapshot", + PERFC_MAX_PT_UPDATES) + +PERFCOUNTER_ARRAY(exceptions, "exceptions", 32) + +#define VMX_PERF_EXIT_REASON_SIZE 44 +#define VMX_PERF_VECTOR_SIZE 0x20 +PERFCOUNTER_ARRAY(vmexits, "vmexits", VMX_PERF_EXIT_REASON_SIZE) +PERFCOUNTER_ARRAY(cause_vector, "cause vector", VMX_PERF_VECTOR_SIZE) + +#define SVM_PERF_EXIT_REASON_SIZE (1+136) +PERFCOUNTER_ARRAY(svmexits, "SVMexits", SVM_PERF_EXIT_REASON_SIZE) + +PERFCOUNTER_CPU(seg_fixups, "segmentation fixups") + +PERFCOUNTER_CPU(apic_timer, "apic timer interrupts") +PERFCOUNTER_CPU(timer_max, "timer max error (ns)") + +PERFCOUNTER_CPU(domain_page_tlb_flush, "domain page tlb flushes") + +PERFCOUNTER_CPU(calls_to_mmu_update, "calls_to_mmu_update") +PERFCOUNTER_CPU(num_page_updates, "num_page_updates") +PERFCOUNTER_CPU(calls_to_update_va, "calls_to_update_va_map") +PERFCOUNTER_CPU(page_faults, "page faults") +PERFCOUNTER_CPU(copy_user_faults, "copy_user faults") + +PERFCOUNTER_CPU(shadow_fault_calls, "calls to shadow_fault") +PERFCOUNTER_CPU(shadow_fault_bail_pde_not_present, + "sf bailed due to pde not present") +PERFCOUNTER_CPU(shadow_fault_bail_pte_not_present, + "sf bailed due to pte not present") +PERFCOUNTER_CPU(shadow_fault_bail_ro_mapping, + "sf bailed due to a ro mapping") +PERFCOUNTER_CPU(shadow_fault_fixed, "sf fixed the pgfault") +PERFCOUNTER_CPU(write_fault_bail, "sf bailed due to write_fault") +PERFCOUNTER_CPU(read_fault_bail, "sf bailed due to read_fault") + +PERFCOUNTER_CPU(map_domain_page_count, "map_domain_page count") +PERFCOUNTER_CPU(ptwr_emulations, "writable pt emulations") + +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) +PERFCOUNTER_CPU(shadow_l4_table_count, "shadow_l4_table count") +PERFCOUNTER_CPU(shadow_l3_table_count, "shadow_l3_table count") +#endif +PERFCOUNTER_CPU(shadow_l2_table_count, "shadow_l2_table count") +PERFCOUNTER_CPU(shadow_l1_table_count, "shadow_l1_table count") +PERFCOUNTER_CPU(unshadow_table_count, "unshadow_table count") +PERFCOUNTER_CPU(shadow_fixup_count, "shadow_fixup count") +PERFCOUNTER_CPU(shadow_update_va_fail1, "shadow_update_va_fail1") +PERFCOUNTER_CPU(shadow_update_va_fail2, "shadow_update_va_fail2") + +/* STATUS counters do not reset when 'P' is hit */ +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) +PERFSTATUS(shadow_l4_pages, "current # shadow L4 pages") +PERFSTATUS(shadow_l3_pages, "current # shadow L3 pages") +#endif +PERFSTATUS(shadow_l2_pages, "current # shadow L2 pages") +PERFSTATUS(shadow_l1_pages, "current # shadow L1 pages") +PERFSTATUS(hl2_table_pages, "current # hl2 pages") +PERFSTATUS(snapshot_pages, "current # fshadow snapshot pages") +PERFSTATUS(writable_pte_predictions, "# writable pte predictions") +PERFSTATUS(free_l1_pages, "current # free shadow L1 pages") + +PERFCOUNTER_CPU(check_pagetable, "calls to check_pagetable") +PERFCOUNTER_CPU(check_all_pagetables, "calls to check_all_pagetables") + +PERFCOUNTER_CPU(shadow_hl2_table_count, "shadow_hl2_table count") +PERFCOUNTER_CPU(shadow_set_l1e_force_map, "shadow_set_l1e forced to map l1") +PERFCOUNTER_CPU(shadow_set_l1e_unlinked, "shadow_set_l1e found unlinked l1") +PERFCOUNTER_CPU(shadow_set_l1e_fail, "shadow_set_l1e failed (no sl1)") +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) +PERFCOUNTER_CPU(shadow_set_l2e_force_map, "shadow_set_l2e forced to map l2") +PERFCOUNTER_CPU(shadow_set_l3e_force_map, "shadow_set_l3e forced to map l3") +#endif +PERFCOUNTER_CPU(shadow_invlpg_faults, "shadow_invlpg's get_user faulted") +PERFCOUNTER_CPU(unshadow_l2_count, "unpinned L2 count") + +PERFCOUNTER_CPU(shadow_status_shortcut, "fastpath miss on shadow cache") +PERFCOUNTER_CPU(shadow_status_calls, "calls to shadow_status") +PERFCOUNTER_CPU(shadow_status_miss, "missed shadow cache") +PERFCOUNTER_CPU(shadow_status_hit_head, "hits on head of bucket") +PERFCOUNTER_CPU(shadow_max_type, "calls to shadow_max_type") + +PERFCOUNTER_CPU(shadow_sync_all, "calls to shadow_sync_all") +PERFCOUNTER_CPU(shadow_sync_va, "calls to shadow_sync_va") +PERFCOUNTER_CPU(resync_l1, "resync L1 page") +PERFCOUNTER_CPU(resync_l2, "resync L2 page") +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) +PERFCOUNTER_CPU(resync_l3, "resync L3 page") +PERFCOUNTER_CPU(resync_l4, "resync L4 page") +#endif +PERFCOUNTER_CPU(resync_hl2, "resync HL2 page") +PERFCOUNTER_CPU(shadow_make_snapshot, "snapshots created") +PERFCOUNTER_CPU(shadow_mark_mfn_out_of_sync_calls, + "calls to shadow_mk_out_of_sync") +PERFCOUNTER_CPU(shadow_out_of_sync_calls, "calls to shadow_out_of_sync") +PERFCOUNTER_CPU(snapshot_entry_matches_calls, "calls to ss_entry_matches") +PERFCOUNTER_CPU(snapshot_entry_matches_true, "ss_entry_matches returns true") + +PERFCOUNTER_CPU(validate_pte_calls, "calls to validate_pte_change") +PERFCOUNTER_CPU(validate_pte_changes1, "validate_pte makes changes1") +PERFCOUNTER_CPU(validate_pte_changes2, "validate_pte makes changes2") +PERFCOUNTER_CPU(validate_pte_changes3, "validate_pte makes changes3") +PERFCOUNTER_CPU(validate_pte_changes4, "validate_pte makes changes4") +PERFCOUNTER_CPU(validate_pde_calls, "calls to validate_pde_change") +PERFCOUNTER_CPU(validate_pde_changes, "validate_pde makes changes") +PERFCOUNTER_CPU(shadow_get_page_fail, "shadow_get_page_from_l1e fails") +PERFCOUNTER_CPU(validate_hl2e_calls, "calls to validate_hl2e_change") +PERFCOUNTER_CPU(validate_hl2e_changes, "validate_hl2e makes changes") +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) +PERFCOUNTER_CPU(validate_entry_changes, "validate_entry changes") +#endif +PERFCOUNTER_CPU(exception_fixed, "pre-exception fixed") +PERFCOUNTER_CPU(get_mfn_from_gpfn_foreign, "calls to get_mfn_from_gpfn_foreign") +PERFCOUNTER_CPU(remove_all_access, "calls to remove_all_access") +PERFCOUNTER_CPU(remove_write_access, "calls to remove_write_access") +PERFCOUNTER_CPU(remove_write_access_easy, "easy outs of remove_write_access") +PERFCOUNTER_CPU(remove_write_no_work, "no work in remove_write_access") +PERFCOUNTER_CPU(remove_write_not_writable, "remove_write non-writable page") +PERFCOUNTER_CPU(remove_write_fast_exit, "remove_write hit predicted entry") +PERFCOUNTER_CPU(remove_write_predicted, "remove_write predict hit&exit") +PERFCOUNTER_CPU(remove_write_bad_prediction, "remove_write bad prediction") +PERFCOUNTER_CPU(update_hl2e_invlpg, "update_hl2e calls invlpg") + +/*#endif*/ /* __XEN_PERFC_DEFN_H__ */ _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-changelog

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