[Xen-changelog] [xen master] x86/HVM: replace plain numbers

[patchbot@xxxxxxx]

commit 156e4eaa3b2665c587683ed01b7223522872108c
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Fri Jan 23 15:13:39 2015 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Jan 23 15:13:39 2015 +0100

    x86/HVM: replace plain numbers
    
    ... making the code better document itself. No functional change
    intended.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/arch/x86/hvm/vioapic.c        |   25 +++++++++++++++++++------
 xen/arch/x86/hvm/vlapic.c         |    2 +-
 xen/include/asm-x86/hvm/vioapic.h |    1 +
 3 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c
index 9248adc..1e48110 100644
--- a/xen/arch/x86/hvm/vioapic.c
+++ b/xen/arch/x86/hvm/vioapic.c
@@ -53,18 +53,26 @@ static uint32_t vioapic_read_indirect(const struct 
hvm_hw_vioapic *vioapic)
     switch ( vioapic->ioregsel )
     {
     case VIOAPIC_REG_VERSION:
-        result = ((((VIOAPIC_NUM_PINS-1) & 0xff) << 16)
-                  | (VIOAPIC_VERSION_ID & 0xff));
+        result = ((union IO_APIC_reg_01){
+                  .bits = { .version = VIOAPIC_VERSION_ID,
+                            .entries = VIOAPIC_NUM_PINS - 1 }
+                  }).raw;
         break;
 
     case VIOAPIC_REG_APIC_ID:
+        /*
+         * Using union IO_APIC_reg_02 for the ID register too, as
+         * union IO_APIC_reg_00's ID field is 8 bits wide for some reason.
+         */
     case VIOAPIC_REG_ARB_ID:
-        result = ((vioapic->id & 0xf) << 24);
+        result = ((union IO_APIC_reg_02){
+                  .bits = { .arbitration = vioapic->id }
+                  }).raw;
         break;
 
     default:
     {
-        uint32_t redir_index = (vioapic->ioregsel - 0x10) >> 1;
+        uint32_t redir_index = (vioapic->ioregsel - VIOAPIC_REG_RTE0) >> 1;
         uint64_t redir_content;
 
         if ( redir_index >= VIOAPIC_NUM_PINS )
@@ -173,7 +181,12 @@ static void vioapic_write_indirect(
         break;
 
     case VIOAPIC_REG_APIC_ID:
-        vioapic->id = (val >> 24) & 0xf;
+        /*
+         * Presumably because we emulate an Intel IOAPIC which only has a
+         * 4 bit ID field (compared to 8 for AMD), using union IO_APIC_reg_02
+         * for the ID register (union IO_APIC_reg_00's ID field is 8 bits).
+         */
+        vioapic->id = ((union IO_APIC_reg_02){ .raw = val }).bits.arbitration;
         break;
 
     case VIOAPIC_REG_ARB_ID:
@@ -181,7 +194,7 @@ static void vioapic_write_indirect(
 
     default:
     {
-        uint32_t redir_index = (vioapic->ioregsel - 0x10) >> 1;
+        uint32_t redir_index = (vioapic->ioregsel - VIOAPIC_REG_RTE0) >> 1;
 
         HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "rte[%02x].%s = %08x",
                     redir_index, vioapic->ioregsel & 1 ? "hi" : "lo", val);
diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index a91cee1..8062f31 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -835,7 +835,7 @@ static int vlapic_write(struct vcpu *v, unsigned long 
address,
     unsigned int offset = address - vlapic_base_address(vlapic);
     int rc = X86EMUL_OKAY;
 
-    if ( offset != 0xb0 )
+    if ( offset != APIC_EOI )
         HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
                     "offset %#x with length %#lx, and value is %#lx",
                     offset, len, val);
diff --git a/xen/include/asm-x86/hvm/vioapic.h 
b/xen/include/asm-x86/hvm/vioapic.h
index ab4e07e..a18ffd0 100644
--- a/xen/include/asm-x86/hvm/vioapic.h
+++ b/xen/include/asm-x86/hvm/vioapic.h
@@ -47,6 +47,7 @@
 #define VIOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
 #define VIOAPIC_REG_VERSION 0x01
 #define VIOAPIC_REG_ARB_ID  0x02 /* x86 IOAPIC only */
+#define VIOAPIC_REG_RTE0    0x10
 
 struct hvm_vioapic {
     struct hvm_hw_vioapic hvm_hw_vioapic;
--
generated by git-patchbot for /home/xen/git/xen.git#master

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