[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] x86/pv: allow reading APIC_BASE MSR
commit a825751f633482c0634ebb7c7b7ba33acadcfe7b Author: Roger Pau Monne <roger.pau@xxxxxxxxxx> AuthorDate: Mon Aug 17 17:57:54 2020 +0200 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Tue Aug 18 17:34:50 2020 +0100 x86/pv: allow reading APIC_BASE MSR Linux PV guests will attempt to read the APIC_BASE MSR, so just report a default value to make Linux happy. Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx> Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- xen/arch/x86/pv/emul-priv-op.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 971ba9e58c..bcc1188f6a 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -872,6 +872,13 @@ static int read_msr(unsigned int reg, uint64_t *val, switch ( reg ) { + case MSR_APIC_BASE: + /* Linux PV guests will attempt to read APIC_BASE. */ + *val = APIC_BASE_ENABLE | APIC_DEFAULT_PHYS_BASE; + if ( !curr->vcpu_id ) + *val |= APIC_BASE_BSP; + return X86EMUL_OKAY; + case MSR_FS_BASE: if ( is_pv_32bit_domain(currd) ) break; -- generated by git-patchbot for /home/xen/git/xen.git#master
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