[qemu-xen staging] target/xtensa: fix simcall for newer hardware

[patchbot@xxxxxxx]

commit 62ed68e33db89584355ca4c63cd5b21dd98df636
Author:     Max Filippov <jcmvbkbc@xxxxxxxxx>
AuthorDate: Mon May 4 05:15:14 2020 -0700
Commit:     Max Filippov <jcmvbkbc@xxxxxxxxx>
CommitDate: Sun May 17 14:52:25 2020 -0700

    target/xtensa: fix simcall for newer hardware
    
    After Xtensa release RE.2 simcall opcode has become nop for the
    hardware instead of illegal instruction.
    
    Signed-off-by: Max Filippov <jcmvbkbc@xxxxxxxxx>
---
 target/xtensa/translate.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 546d2fa2fa..4bc15252c8 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -2367,9 +2367,10 @@ static bool test_ill_simcall(DisasContext *dc, const 
OpcodeArg arg[],
 #ifdef CONFIG_USER_ONLY
     bool ill = true;
 #else
-    bool ill = !semihosting_enabled();
+    /* Between RE.2 and RE.3 simcall opcode's become nop for the hardware. */
+    bool ill = dc->config->hw_version <= 250002 && !semihosting_enabled();
 #endif
-    if (ill) {
+    if (ill || !semihosting_enabled()) {
         qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is 
disabled\n");
     }
     return ill;
@@ -2379,7 +2380,9 @@ static void translate_simcall(DisasContext *dc, const 
OpcodeArg arg[],
                               const uint32_t par[])
 {
 #ifndef CONFIG_USER_ONLY
-    gen_helper_simcall(cpu_env);
+    if (semihosting_enabled()) {
+        gen_helper_simcall(cpu_env);
+    }
 #endif
 }
 
--
generated by git-patchbot for /home/xen/git/qemu-xen.git#staging