[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] x86/hvm: Drop pat_entry_2_pte_flags
commit 848ca4e75f972e1d6ddae110965b2cc24997544f Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Mon Jan 16 11:01:26 2023 +0000 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Fri Jan 20 19:39:32 2023 +0000 x86/hvm: Drop pat_entry_2_pte_flags Converting from PAT to PTE is trivial, and shorter to encode with bitwise logic than the space taken by a table counting from 0 to 7 in non-adjacent bits. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> --- xen/arch/x86/hvm/mtrr.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c index 093103f6c7..344edc2d6a 100644 --- a/xen/arch/x86/hvm/mtrr.c +++ b/xen/arch/x86/hvm/mtrr.c @@ -29,13 +29,6 @@ /* Get page attribute fields (PAn) from PAT MSR. */ #define pat_cr_2_paf(pat_cr,n) ((((uint64_t)pat_cr) >> ((n)<<3)) & 0xff) -/* PAT entry to PTE flags (PAT, PCD, PWT bits). */ -static const uint8_t pat_entry_2_pte_flags[8] = { - 0, _PAGE_PWT, - _PAGE_PCD, _PAGE_PCD | _PAGE_PWT, - _PAGE_PAT, _PAGE_PAT | _PAGE_PWT, - _PAGE_PAT | _PAGE_PCD, _PAGE_PAT | _PAGE_PCD | _PAGE_PWT }; - /* Effective mm type lookup table, according to MTRR and PAT. */ static const uint8_t mm_type_tbl[MTRR_NUM_TYPES][X86_NUM_MT] = { #define RS MEMORY_NUM_TYPES @@ -117,7 +110,7 @@ uint8_t pat_type_2_pte_flags(uint8_t pat_type) if ( unlikely(pat_entry == INVALID_MEM_TYPE) ) pat_entry = pat_entry_tbl[X86_MT_UC]; - return pat_entry_2_pte_flags[pat_entry]; + return cacheattr_to_pte_flags(pat_entry); } int hvm_vcpu_cacheattr_init(struct vcpu *v) -- generated by git-patchbot for /home/xen/git/xen.git#master
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