[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging] x86emul: drop further Xeon Phi decode leftovers
commit a4cf904bea9c535e1cac66bf0aee7a4275b4e1e2 Author: Jan Beulich <jbeulich@xxxxxxxx> AuthorDate: Thu Aug 29 10:01:19 2024 +0200 Commit: Jan Beulich <jbeulich@xxxxxxxx> CommitDate: Thu Aug 29 10:01:19 2024 +0200 x86emul: drop further Xeon Phi decode leftovers Special casing in x86emul_decode() can be dropped, while overrides done in decode_0f38() can move into ext0f38_table[]. That table's S/G prefetch entries aren't needed anymore either. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- xen/arch/x86/x86_emulate/decode.c | 28 ++-------------------------- 1 file changed, 2 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/x86_emulate/decode.c b/xen/arch/x86/x86_emulate/decode.c index 5a880578c7..faaeb2547d 100644 --- a/xen/arch/x86/x86_emulate/decode.c +++ b/xen/arch/x86/x86_emulate/decode.c @@ -427,13 +427,11 @@ static const struct ext0f38_table { [0xbe] = { .simd_size = simd_packed_fp, .d8s = d8s_vl }, [0xbf] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, [0xc4] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_vl }, - [0xc6 ... 0xc7] = { .simd_size = simd_other, .vsib = 1, .d8s = d8s_dq }, [0xc8] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, [0xc9] = { .simd_size = simd_other }, [0xca] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0xcb] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, - [0xcc] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_vl }, - [0xcd] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq }, + [0xcb] = { .simd_size = simd_other, .d8s = d8s_vl }, + [0xcc ... 0xcd] = { .simd_size = simd_other, .two_op = 1, .d8s = d8s_vl }, [0xcf] = { .simd_size = simd_packed_int, .d8s = d8s_vl }, [0xd2] = { .simd_size = simd_other }, [0xd3] = { .simd_size = simd_other }, @@ -918,14 +916,6 @@ decode_0f38(struct x86_emulate_state *s, case X86EMUL_OPC_EVEX_66(0, 0x7c): /* vpbroadcast{d,q} */ break; - case X86EMUL_OPC_VEX_F2(0, 0xcc): /* vsha512msg1 */ - case X86EMUL_OPC_VEX_F2(0, 0xcd): /* vsha512msg2 */ - s->desc |= TwoOp; - /* fallthrough */ - case X86EMUL_OPC_VEX_F2(0, 0xcb): /* vsha512rnds2 */ - s->simd_size = simd_other; - break; - case 0xf0: /* movbe / crc32 */ s->desc |= s->vex.pfx == vex_f2 ? ByteOp : Mov; if ( s->vex.pfx >= vex_f3 ) @@ -1421,20 +1411,6 @@ int x86emul_decode(struct x86_emulate_state *s, s); s->simd_size = simd_other; } - - switch ( b ) - { - /* vp4dpwssd{,s} need special casing */ - case 0x52: case 0x53: - /* v4f{,n}madd{p,s}s need special casing */ - case 0x9a: case 0x9b: case 0xaa: case 0xab: - if ( s->evex.pfx == vex_f2 ) - { - disp8scale = 4; - s->simd_size = simd_128; - } - break; - } } break; -- generated by git-patchbot for /home/xen/git/xen.git#staging
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