Re: [Xen-devel] x86_64/page.h L1_DISALLOW_MASK, etc

[Keir Fraser <Keir.Fraser@xxxxxxxxxxxx>]

On 29 Mar 2005, at 01:15, Karen White wrote:

> In xen/include/asm-x86/x86_64/page.h, it appears the #defines for
> L1_DISALLOW_MASK, L2_DISALLOW_MASK, etc. have the assignment backwards
> in the conditional test.  The current code appears to be setting the NX
> bit if the cpu does not have the NX feature, as opposed to if it does.
Yes, because it's a disallow mask. We don't want to disallow the NX bit 
if the CPU supports it, so we don't OR it into the mask. The current 
way round is correct.
> Also, what exactly is being set when setting the 3 bits for the
> L2_DISALLOW_MASK, L3_DISALLOW_MASK, and L4_DISALLOW_MASK definitions?
Bit 7 is PSE, which we don't support in guest tables.
Bit 8 is PGE: also unsupported.
Bit 9 is a mistake -- it's available for OS use -- so I will remove it 
from the mask.
 Thanks,
 Keir

> Karen
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