RE: [Xen-devel] HPET/PIT timer accuracy

["King, Steven R" <steven.r.king@xxxxxxxxx>]

The RDTSC instruction is out-of-order on Intel CPU's as well.  You can
place serializing instructions such as CPUID before and/or after RDTSC
to get better locality.  Unfortunately, CPUID expends many more cycles
than the RDTSC instruction on its own.

-----Original Message-----
From: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
[mailto:xen-devel-bounces@xxxxxxxxxxxxxxxxxxx] On Behalf Of Benjamin
LaHaise
Sent: Friday, July 29, 2005 6:33 PM
To: Ronald G. Minnich
Cc: Ian Pratt; xen-devel List
Subject: Re: [Xen-devel] HPET/PIT timer accuracy

On Fri, Jul 29, 2005 at 11:51:19AM -0600, Ronald G. Minnich wrote:
> I can only tell you we've seen weird numbers from the opteron tsc, to 
> the point that we don't entirely trust it. Not sure why.

Opterons can execute RDTSC out of order.

                -ben
--
"Time is what keeps everything from happening all at once." -- John
Wheeler

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