RE: [Xen-devel] [PATCH][VT]vga acceleration for cirrus logic device model

["Jiang, Yunhong" <yunhong.jiang@xxxxxxxxx>]

Keir Fraser wrote:
>>> allocate new l2 tables on demand.
>>> 
>>> Something like this will certainly be needed for 64-bit tables
>>> anyway, where it's infeasible to pre-allocate all l3 and l2 table
>>> entries. 
>> 
>> I'm a bit confused on this. This mapping is for 1:1 page table, and
>> there is only one L3 table and 4 l2 table totally even for 64 bit
>> table.
> 
> Ah yes, good point.
> 
> In that case I think the code's fine as it is. I'll check it in.
> 
>   -- Keir

Hmm, seems you have been persuaded by me, but I can't persuade myself
after more thinking :-) 

In fact, I'm not quite sure still and hope your feedback.

There may be some problem on current 1:1 page table for 64 bit guest.
Considering a guest has memory more than 4G. Current implementation may
cause problem on physical to machine mapping.

However, this patch works on currently 1:1 page table implementation. So
how about check it in firstly, and I will provide a total solution to
improve the whole thing, because I think the 4 level 1:1 page table is
more complex than 3 level, we may have to provide dynamical setting,
still on consideration.

Thanks
Yunhong Jiang

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