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RE: [Xen-devel] [PATCH] [VT] add BT instruction support to VMXMMIO decoder

>>- in the same place, you implicitly assume that va and gpa are
>>congruent over a range 2**29/2**61 bytes, which is likely wrong,
>>especially for mmio regions (while one could argue that there
>>be accesses with a base address pointing into one mmio region, but
>>effective address with the shifted bit offset included pointing into
>>different on, I believe the hypervisor should actually verify this
>>either handle it properly or fail the request)
>>- the alignment (and thus implicit range) limitations of real
>>aren't followed (for e.g. a 32-bit operation, hardware confines the
>>access to the aligned 32-bit quantity addressed by 
>>to match that you should either pass 1 instead of mmio_inst.op_size
>>send_mmio_req, or you should calculate the offset from gpa depending
>>the operand size (which is probably the better solution, although I
>>don't know which of the two possible mechanisms real hardware uses)
>Yes, this is not perfect.
>Can you help?

Not without first understanding the infrastructure of the decoder,
which I haven't looked at in detail. Looking at the call site of
handle_mmio I believe that getting this right requires more than just
adjusting the specific INSTR_BT cases that you patch touches, because
the call to gva_to_gpa() (and thus the decision made by mmio_space())
must be done *AFTER* instruction decoding. And this is not only true for
bt, but for all instructions that touch more than a single byte, because
(at least for security reasons) one must deal with the case of accesses
that straddle page boundaries (or, if mmio regions are allocated at an
even finer granularity - which is commonly the case -, even device


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