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[Xen-devel] [PATCH]fix for xentrace_format on 64bit


  • To: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxx>
  • From: Rob Gardner <rob.gardner@xxxxxx>
  • Date: Fri, 18 Nov 2005 09:47:37 -0700
  • Delivery-date: Fri, 18 Nov 2005 16:47:40 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xensource.com>

This is a resend of the patch I sent out yesterday which apparently got garbled.

The xentrace_format script doesn't work on x86/64. Python pads the input structure because the first field is 32 bits and the next is 64 bits, whereas x86-32 doesn't pad. The quick fix is to read the cpu id separately as a 32bit value, then read the rest of the trace record. Here is a little patch that does that. Tested on x86/32 SMP and x86/64.


Signed-off-by: Rob Gardner  <rob.gardner@xxxxxx>

# HG changeset patch
# User rob.gardner@xxxxxx
# Node ID a65d04d96b04d686f29c7a0df8c829b46a957d4f
# Parent  9bf6f907b3ff0261902f06d261f76c1bd12af9f5
Change xentrace_format to handle 64 bit structure packing

diff -r 9bf6f907b3ff -r a65d04d96b04 tools/xentrace/xentrace_format
--- a/tools/xentrace/xentrace_format    Wed Nov 16 10:29:52 2005
+++ b/tools/xentrace/xentrace_format    Thu Nov 17 22:28:32 2005
@@ -85,7 +85,9 @@

# structure of trace record + prepended CPU id (as output by xentrace):
# CPU(I) TSC(Q) EVENT(L) D1(L) D2(L) D3(L) D4(L) D5(L)
-TRCREC = "IQLLLLLL"
+# read CPU id separately to avoid structure packing problems on 64-bit arch.
+CPUREC = "I"
+TRCREC = "QLLLLLL"

last_tsc = [0,0,0,0,0,0,0,0]

@@ -94,11 +96,16 @@
while not interrupted:
    try:
    i=i+1
+        line = sys.stdin.read(struct.calcsize(CPUREC))
+        if not line:
+            break
+        cpu = struct.unpack(CPUREC, line)[0]
+
        line = sys.stdin.read(struct.calcsize(TRCREC))
        if not line:
            break

-        (cpu, tsc, event, d1, d2, d3, d4, d5) = struct.unpack(TRCREC, line)
+        (tsc, event, d1, d2, d3, d4, d5) = struct.unpack(TRCREC, line)

    #tsc = (tscH<<32) | tscL


# HG changeset patch
# User rob.gardner@xxxxxx
# Node ID a65d04d96b04d686f29c7a0df8c829b46a957d4f
# Parent  9bf6f907b3ff0261902f06d261f76c1bd12af9f5
Change xentrace_format to handle 64 bit structure packing

diff -r 9bf6f907b3ff -r a65d04d96b04 tools/xentrace/xentrace_format
--- a/tools/xentrace/xentrace_format    Wed Nov 16 10:29:52 2005
+++ b/tools/xentrace/xentrace_format    Thu Nov 17 22:28:32 2005
@@ -85,7 +85,9 @@
 
 # structure of trace record + prepended CPU id (as output by xentrace):
 # CPU(I) TSC(Q) EVENT(L) D1(L) D2(L) D3(L) D4(L) D5(L)
-TRCREC = "IQLLLLLL"
+# read CPU id separately to avoid structure packing problems on 64-bit arch.
+CPUREC = "I"
+TRCREC = "QLLLLLL"
 
 last_tsc = [0,0,0,0,0,0,0,0]
 
@@ -94,11 +96,16 @@
 while not interrupted:
     try:
        i=i+1
+        line = sys.stdin.read(struct.calcsize(CPUREC))
+        if not line:
+            break
+        cpu = struct.unpack(CPUREC, line)[0]
+
         line = sys.stdin.read(struct.calcsize(TRCREC))
         if not line:
             break
 
-        (cpu, tsc, event, d1, d2, d3, d4, d5) = struct.unpack(TRCREC, line)
+        (tsc, event, d1, d2, d3, d4, d5) = struct.unpack(TRCREC, line)
 
        #tsc = (tscH<<32) | tscL
 
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