[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: [Xen-devel] Re: IRQs delivery.

>From: Hollis Blanchard
>Sent: 2006年3月11日 1:27
>Tristan Gingold wrote:
>>On ia64, PIC is part of the processor and is already fully-virtualized.
>>We are considering to switch to event channel.
>What do you mean by "already fully virtualized" -- you mean before Xen,
>this was already part of the architecture? Could you elaborate on that?

I may put some word on this, since simple "PIC" is not clear term here. 
The interrupt architecture on IA64 is called SAPIC (Steamlined Advanced 
Programmable Interrupt Controller), which is mostly like APIC architecture 
on X86. For example, there're also two parts: IOSAPIC and Local SAPIC, 
with IOSAPIC sitting in the chipset, while Local SAPIC part of processor. 
Part of Local SAPIC is virtualized due to processor virtualization, like 
registers. MMIO of Local SAPIC like PIB/XTP and IOSAPIC are handled 
differently, and that's the part we're proposing strongly to reuse same 
xen/x86 event channel mechanism on xen-ia64 mailing list now.

Hope helps.


Xen-devel mailing list



Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.