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[XenPPC] Re: [RFC PATCH 28/33] Add Xen grant table support



I object to these uses of (synch_)cmpxchg on a uint16_t in common code.
Many architectures, including PowerPC, do not support 2-byte atomic
operations, but this code is common to all Xen architectures.

RMW operations you mean, I suppose.  On PowerPC, all (naturally
aligned) halfword operations are atomic; there do not exist any
RMW operations; but word and doubleword atomic RMW operations
can be emulated.

Boils down to the same thing of course, but it isn't the same ;-)


Segher


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