[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] RE: [Xen-changelog] [xen-unstable] [HVM][SVM] Obtaining instruction address needs to mask to 32 bits
On 2/10/06 12:56, "Petersson, Mats" <Mats.Petersson@xxxxxxx> wrote: > Where we're adding to EIP we probably should take this into acocunt - > although most code wouldn't naturally wrap the IP (in fact, I think it's > a fault to do so - but I can't confirm that from any of my books), so > it's probably a very obscure corner-case - but it's probably a bit > nightmarish to debug so it's possibly better to have code that deals > with it correctly. I'll figure out if it's a fault or "wrap" that is the > correct operation first... I think it faults on AMD and silently wraps on Intel. One of the Xbox hacks relies on this 'feature' to break into the secure bootstrap sequence. I doubt anyone legitimately relies on it so I'm not too concerned about this case. Also, back to my original point, it's probably a good idea to mask the high bits of RIP when in 16-bit mode. I doubt that the switch from 32- to 16-bit mode guarantees to clear those high bits. Or does it? -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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