That’s true, if we have more than 4 PCI
devices need IRQ, then have to share, it is doesn’t matter how many PRT package
entry you added for each device in pic mode, only have 4 IRQ to
use.
And in APIC mode, IRQ is not routed through
south bridge PCI IRQ router for IOAPIC, those four PCI routers are for 8259 PIC.
Current QEMU using INT1_0/15 to IRQ0/15 one to one mapping, but that does not
mean no APIC mode support, if we have bug we have to fix.
I think (b) is a short term solution, if we
upgrade south bridge from PIIX3/4 to newer ICHx, we could have 8 PIC mode PCI
IRQ router and 24 IOAPIC IRQ in APIC mode. I think IPF platform already support
24 IOAPIC IRQs now.
I would like David separated the patch,
one for PIC mode PCI IRQ routing _ADR address fix, this one is good, another
one for cutting PIC mode support, this one may need more
discussion.
Regards,
Winston,
From: Keir Fraser
[mailto:Keir.Fraser@xxxxxxxxxxxx]
Sent: Friday, October 13, 2006
10:00 AM
To: Dave Lively; Wang, Winston L
Cc: xen-devel@xxxxxxxxxxxxxxxxxxx
Subject: Re: [Xen-devel]
[PATCH][HVM] fix PCI interrupt routing via ACPI
On 13/10/06 17:36, "Dave
Lively" <dave.lively@xxxxxxxxx> wrote:
(b) Make the LNKx devices' _PRS methods include IRQs
> 16 for APIC
mode. This exposes the expanded
set of possible IRQs to the
guest interrupt routing code.
Trivial to implement.
There are still only 4 LNK devices though (which PCI devices are striped across),
and they cannot address IRQs > 15. These are both limitations of PIIX
hardware. If we break that emulation, we may as well get rid of the PIIX
PCI-ISA bridge device altogether and statically define everything (not a bad
idea imo).
-- Keir
