[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH] hide RDTSCP feature flag from PV guests
Linux 2.6.19 (x86-64) makes use of this feature if available, but Xen (validly) fails the attempt to write the respective MSR. Hence the feature must be hidden from PV guests. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx> Index: 2007-01-16/xen/arch/x86/traps.c =================================================================== --- 2007-01-16.orig/xen/arch/x86/traps.c 2007-01-15 09:10:11.000000000 +0100 +++ 2007-01-16/xen/arch/x86/traps.c 2007-02-01 17:25:28.000000000 +0100 @@ -597,6 +597,11 @@ static int emulate_forced_invalid_op(str if ( !IS_PRIV(current->domain) ) clear_bit(X86_FEATURE_MTRR, &d); } + else if ( regs->eax == 0x80000001 ) + { + /* Modify Feature Information. */ + clear_bit(X86_FEATURE_RDTSCP % 32, &d); + } else { (void)cpuid_hypervisor_leaves(regs->eax, &a, &b, &c, &d); Index: 2007-01-16/xen/include/asm-x86/cpufeature.h =================================================================== --- 2007-01-16.orig/xen/include/asm-x86/cpufeature.h 2006-04-24 15:28:58.000000000 +0200 +++ 2007-01-16/xen/include/asm-x86/cpufeature.h 2007-02-01 17:25:15.000000000 +0100 @@ -49,6 +49,7 @@ #define X86_FEATURE_MP (1*32+19) /* MP Capable. */ #define X86_FEATURE_NX (1*32+20) /* Execute Disable */ #define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */ +#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */ #define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */ #define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */ #define X86_FEATURE_3DNOW (1*32+31) /* 3DNow! */ _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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