Re: [Xen-devel] P2M Top Level Page Table

[Keir Fraser <keir@xxxxxxxxxxxxx>]

PAE shadow mode always points CR3 at v->arch.paging.shadow.l3table[], which is guaranteed below 4GB and is a cache of the shadow entries. So it does not matter at all whether the P2M root table is above 4GB.

 -- Keir

On 29/3/07 17:05, "Huang2, Wei" <Wei.Huang2@xxxxxxx> wrote:

Current P2M table are allocated through alloc_domheap_pages(), which can potentially allocate memory with physical address > 4G under PAE mode. However, for top level P2M table (under PAE mode), its physical address should be below 4G because CR3 has only 32 bits. I noticed that mm.c relies on pae_l3_cache to solve this problem in make_cr3(). Do we plan to have similar solution for P2M table? Another solution might use xmalloc; but I just wonder whether it always returns memory below 4G.

Any though?

Thanks,

-Wei

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