[Xen-devel] [PATCH][SVM] fix #BP intercept (INT3)

["Woller, Thomas" <thomas.woller@xxxxxxx>]

This AMD-V patch resolves two severe issues with functionality
concerning:
1) INT3 intercept/reflection #BP causing injection/VMEXIT flooding
2) Vista/Longhorn "windowing" failures (Control panel icons, and games
fail to be displayed)

This patch increments the RIP properly for #BP intercepts (INT3
instructions in the guest) for AMD-V platforms.  Both of these issues
only manifest if #BP exception intercept is enabled (in support.h)

- Without this patch guest code which execute INT3 instructions (0xCC),
and relies on the CS:RIP for the next instruction, fail. Under these
circumstances this can result in excessive #BP VMEXITs, and resulting
excessive reflection of INT3 exception back to the guest, causing severe
performance and functional degredation.

- The Vista control panel currently fails to properly load the Icons, or
fails to be displayed at all. Additionally, some of the Vista games fail
to load.  Not sure exactly what Vista is doing here with INT3, but vista
needs this fix.

AMD-V documentation indicates the CS:RIP on the return from #BP VMEXIT
points to the 0xCC instruction, *not* the instruction following. 

Changeset 14628 can be reverted, as both problems do not manifest
themselves if #BP is not intercepted. Default #BP exception is useful
though for _DOMF_debugging enablement.  and no reason to penalize VT on
account of an AMD-V bug either :).

SW INT 3 (0xcd 0x03) causes a different VMEXIT code (0x75) so this
instruction pair for "INT 3" does not need to be added to the svm
emulation code (emulate.c).

Please apply to Xen-unstable.
Applies cleanly to c/s 14631.
Signed-off-by Tom Woller <thomas.woller@xxxxxxx>
Signed-off-by Thomas Friebel <thomas.friebel@xxxxxxx>

  --Tom

thomas.woller@xxxxxxx  +1-512-602-0059
AMD Corporation - Operating Systems Research Center
5204 E. Ben White Blvd. UBC1
Austin, Texas 78741

Attachment: svm_bp_incr_rip.patch
Description: svm_bp_incr_rip.patch

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