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RE: [Xen-devel] Why CR0.WP is always set in HVM domain



To set cr0.wp is to prevent supervisor writing into read-only memory protected 
by page directory/page table entry.

I remember some old x86 processor (i.e. 486) didn't have wp bit at cr0. At that 
time, supervisor can write into even read-only memory.
To add wp bit at cr0 is to support copy-on-write technology of UNIX.

Regards,
Jinsong

-----Original Message-----
From: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx 
[mailto:xen-devel-bounces@xxxxxxxxxxxxxxxxxxx] On Behalf Of Jiang, Yunhong
Sent: 2007年11月8日 22:23
To: xen-devel@xxxxxxxxxxxxxxxxxxx; Tim Deegan
Subject: [Xen-devel] Why CR0.WP is always set in HVM domain

In "arch/x86/hvm/vmx/vmx.c", vmx_update_guest_cr(), the CR0.WP is always
set as following code:
        v->arch.hvm_vcpu.hw_cr[0] =
            v->arch.hvm_vcpu.guest_cr[0] |
            X86_CR0_PE | X86_CR0_NE | X86_CR0_PG | X86_CR0_WP;

I'm wondering are there any special reason for this? I try to check
shadow code and didn't find any clue.
Can anyone give me some hints?

Thanks
Yunhong Jiang

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