[Xen-devel] Re: [PATCH] Fix lapic timer stop issue in deep C state

[Keir Fraser <keir.fraser@xxxxxxxxxxxxx>]

Applied, after a lot of restructuring.

Also, would it be cleaner to set up the HPET to do direct FSB writes to a
local APIC, rather than hijacking PIT ch0? There are some corner cases where
we leave PIT ch0 enabled after boot. Do most HPET implementations support
direct FSB interrupt delivery?

 -- Keir

On 20/5/08 16:22, "Wei, Gang" <gang.wei@xxxxxxxxx> wrote:

> Local APIC timer may stop at deep C state (C3/C4...) entry/exit. this
> patch add the logic that use platform timer (HPET) to reenable local
> APIC timer at C state entry/exit.
> 
> Signed-off-by: Wei Gang <gang.wei@xxxxxxxxx>
> Signed-off-by: Yu Ke <ke.yu@xxxxxxxxx>



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