[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] hvm: live migration between intel and amd
On 13/6/08 16:46, "Jean Guyader" <jean.guyader@xxxxxxxxxxxxx> wrote: > + /* Do we come from AMD processor ? */ > + if ( data->msr_flags == -1ULL ) > + { > + data->msr_flags = 0x7ULL; > + > + data->ldtr_limit = 0xffffffff; > + data->ldtr_arbytes = 0xc00; > + > + data->cs_arbytes = 0xc9b; > + > + data->gs_limit = 0xffffffff; > + data->gs_arbytes = 0xc00; > + > + data->tr_arbytes = 0x8b; > + } > + It's a bit rude to trample register state like this. Why do limits need to be forced? The Intel manuals do not specify that any vm-entry checks are applied to segment limits outside of vm86 mode. -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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