[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] RE: [Xen-devel] Can we disable secondary_bus_reset in runtime?
Yes. I plugged a 82541PI NIC(01:00.0) into motherborad and tested the SecondaryBusReset against 00:1e.0. (Please see the below for the PCI hierarchy of my host) And actually the same python function was tested on many hosts by our QA. No issue is reported about it. I haven't received other issue report before you. :-) Your host is also DQ35? What is the details of the issue? [root@cui ~]# lspci -tv -[0000:00]-+-00.0 Intel Corporation 82G33/G31/P35/P31 Express DRAM Controller +-02.0 Intel Corporation 82G33/G31 Express Integrated Graphics Controller +-03.0 Intel Corporation 82G33/G31/P35/P31 Express MEI Controller +-03.1 Intel Corporation 82G33/G31/P35/P31 Express MEI Controller +-03.2 Intel Corporation 82G33/G31/P35/P31 Express PT IDER Controller +-03.3 Intel Corporation 82G33/G31/P35/P31 Express Serial KT Controller +-19.0 Intel Corporation 82566DM-2 Gigabit Network Connection +-1a.0 Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 +-1a.1 Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 +-1a.2 Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #6 +-1a.7 Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 +-1b.0 Intel Corporation 82801I (ICH9 Family) HD Audio Controller +-1d.0 Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 +-1d.1 Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 +-1d.2 Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 +-1d.7 Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 +-1e.0-[0000:01]----00.0 Intel Corporation 82541PI Gigabit Ethernet Controller +-1f.0 Intel Corporation Unknown device 2910 +-1f.2 Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 4 port SATA IDE Controller +-1f.3 Intel Corporation 82801I (ICH9 Family) SMBus Controller \-1f.5 Intel Corporation 82801I (ICH9 Family) 2 port SATA IDE Controller -----Original Message----- From: Neo Jia [mailto:neojia@xxxxxxxxx] Sent: 2008年9月3日 11:10 To: Cui, Dexuan Cc: xen-devel@xxxxxxxxxxxxxxxxxxx Subject: Re: [Xen-devel] Can we disable secondary_bus_reset in runtime? Dexuan, Have you ever try/test the secondary bus reset on any NIC? Thanks, Neo 2008/9/2 Cui, Dexuan <dexuan.cui@xxxxxxxxx>: > Hi Neo, > I think you mean the python function do_secondary_bus_reset(). > Could you please detail the issue you meet with? > If you want to not use that for debug's perpose temporarily, you can just > modify tools/python/xen/util/pci.py: do_FLR(). (and you may also need to > remove some checkings in > tools/python/xen/xend/server/pciif.py:setupDevice()), then execute "xend > restart" to make the changes take effect. > > -- Dexuan > > > -----Original Message----- > From: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx > [mailto:xen-devel-bounces@xxxxxxxxxxxxxxxxxxx] On Behalf Of Neo Jia > Sent: 2008年9月3日 7:41 > To: xen-devel@xxxxxxxxxxxxxxxxxxx > Subject: [Xen-devel] Can we disable secondary_bus_reset in runtime? > > I think we need this feature at least for debugging purpose, right? > > Or, do we already have this feature? > > Thanks, > Neo > > -- > I would remember that if researchers were not ambitious > probably today we haven't the technology we are using! > > _______________________________________________ > Xen-devel mailing list > Xen-devel@xxxxxxxxxxxxxxxxxxx > http://lists.xensource.com/xen-devel > -- I would remember that if researchers were not ambitious probably today we haven't the technology we are using! _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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