RE: [Xen-devel] [Patch] x86: enforce strict memory order for x2apic

["Tian, Kevin" <kevin.tian@xxxxxxxxx>]

Please forget this one. I made mistake since we'll assume
send_IPI_mask as a barrier now. :-)

Thanks,
Kevin

>From: Tian, Kevin
>Sent: 2008年9月25日 16:39
>
>>From: Keir Fraser [mailto:keir.fraser@xxxxxxxxxxxxx]
>>Sent: 2008年9月25日 16:36
>>
>>On 25/9/08 09:29, "Tian, Kevin" <kevin.tian@xxxxxxxxx> wrote:
>>
>>>> On the other hand you're penalizing LAPIC systems with
>>this, too. I'm
>>>> not certain that's better than fixing the (incorrect)
>>>> assumptions just in
>>>> the x2APIC case.
>>>
>>> I agree. I'll revise the patch to add a 'mb()' in x2APIC instead,
>>> though that may bring a bit overhead to cases when fencing
>>> is not required, like event check IPI.
>>
>>To be precise, mb() at top of send_IPI_mask_x2apic(), and
>>wmb() may as well
>>go from on_selected_cpus() as we can assume send_IPI_mask() is
>>a barrier.
>>
>>I'll do the patch for this myself.
>>
>
>Yes, and thanks. Also please add a wmb() in flush_area_mask,
>though it's a nop but semanticly desired like for on_selected_cpus.

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