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Re: [Xen-devel] [PATCH 0/9] PCI SR-IOV support



Apparently not all of this code is really written from scratch - would it be
possible to indicate which pieces are really backports or adoptions of
mainline Linux code?

Thanks, Jan

>>> "Zhao, Yu" <yu.zhao@xxxxxxxxx> 27.09.08 10:58 >>>
Greetings,

Following patches enable Xen to support SR-IOV capability. PCI device with the 
capability can be turned into multiple ones from software perspective, thus 
user can assign these Virtual Functions to HVM and PV guest.

[PATCH 1/9] dom0 PCI: export some functions and macros
[PATCH 2/9] dom0 PCI: add new general functions
[PATCH 3/9] dom0 PCI: support ARI capability
[PATCH 4/9] dom0 PCI: support SR-IOV capability
[PATCH 5/9] dom0 PCI: reserve bus range for SR-IOV device
[PATCH 6/9] dom0 PCI: document the change
[PATCH 7/9] dom0 PCI backend: enable PV guest SR-IOV support
[PATCH 8/9] qemue: enable HMV guest SR-IOV support
[PATCH 9/9] xen: add SR-IOV support to xm

 Documentation/DocBook/kernel-api.tmpl   |    2
 Documentation/PCI/pci-iov-howto.txt     |  227 ++++++++
 drivers/pci/iov.c                       |  832 ++++++++++++++++++++++++++++++++
 hw/pass-through.c                       |   81 +++
 drivers/pci/Kconfig                     |   11
 drivers/pci/Makefile                    |    2
 drivers/pci/iov.c                       |   24
 drivers/pci/pci-sysfs.c                 |   19
 drivers/pci/pci.c                       |  107 +++-
 drivers/pci/pci.h                       |   95 +++
 drivers/pci/probe.c                     |  238 +++++----
 drivers/pci/proc.c                      |    7
 drivers/pci/setup-bus.c                 |    4
 drivers/pci/setup-res.c                 |   31 -
 drivers/xen/pciback/conf_space_header.c |   71 ++
 include/linux/pci.h                     |   99 +++
 include/linux/pci_regs.h                |   36 +
 tools/python/xen/util/pci.py            |  177 ++++++
 tools/python/xen/xm/main.py             |   40 +
 19 files changed, 1937 insertions(+), 166 deletions(-)

---

Single Root I/O Virtualization (SR-IOV) capability defined by PCI-SIG is 
intended to enable multiple system software to share PCI hardware resources. 
PCI device that supports this capability can be extended to one Physical 
Functions plus multiple Virtual Functions. Physical Function, which could be 
considered as the "real" PCI device, reflects the hardware instance and manages 
all physical resources. Virtual Functions are associated with a Physical 
Function and shares physical resources with the Physical Function. Software can 
control allocation of Virtual Functions via registers encapsulated in the 
capability structure.

SR-IOV specification can be found at 
http://www.pcisig.com/members/downloads/specifications/iov/sr-iov1.0_11Sep07.pdf
 

Devices that support SR-IOV are available from following vendors:
http://download.intel.com/design/network/ProdBrf/320025.pdf 
http://www.netxen.com/products/chipsolutions/NX3031.html 
http://www.neterion.com/products/x3100.html 

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