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Re: [Xen-devel] [PATCH][IOEMU] fix invisibility of PCI Option ROM



Hi Shimada-san,

Thanks for your comment.
I agree it's not good to modify the generic function.
Let me think for a while since I'm newbie in passthrough. 

Thanks,
Kouya

Yuji Shimada writes:
> Hi, Shimura-san,
> 
> It is better to write OS reporting value to device in "pt_bar_reg_init"
> function, I think.
> 
> The reasons are followings.
> 
> - "pt_pci_write_config" and "pt_pci_read_config" are generic function.
>   It is not good to put register-specific code to them.
> 
> - We need to set rom base address to device, because we'd like device
>   to respond to the access from guest software.
> 
> Thanks,
> --
> Yuji Shimada
> 
> 
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@xxxxxxxxxxxxxxxxxxx
> http://lists.xensource.com/xen-devel

Signed-off-by: Kouya Shimura <kouya@xxxxxxxxxxxxxx>

diff --git a/hw/pass-through.c b/hw/pass-through.c
index 77ab759..0abe1c9 100644
--- a/hw/pass-through.c
+++ b/hw/pass-through.c
@@ -93,6 +93,9 @@ static int pt_long_reg_read(struct pt_dev *ptdev,
 static int pt_bar_reg_read(struct pt_dev *ptdev,
     struct pt_reg_tbl *cfg_entry,
     uint32_t *value, uint32_t valid_mask);
+static int pt_exp_rom_bar_reg_read(struct pt_dev *ptdev,
+    struct pt_reg_tbl *cfg_entry,
+    uint32_t *value, uint32_t valid_mask);
 static int pt_byte_reg_write(struct pt_dev *ptdev, 
     struct pt_reg_tbl *cfg_entry, 
     uint8_t *value, uint8_t dev_value, uint8_t valid_mask);
@@ -305,7 +308,7 @@ static struct pt_reg_info_tbl pt_emu_reg_header0_tbl[] = {
         .ro_mask    = 0x000007FE,
         .emu_mask   = 0xFFFFF800,
         .init       = pt_bar_reg_init,
-        .u.dw.read  = pt_long_reg_read,
+        .u.dw.read  = pt_exp_rom_bar_reg_read,
         .u.dw.write = pt_exp_rom_bar_reg_write,
     },
     {
@@ -2262,6 +2265,29 @@ static int pt_bar_reg_read(struct pt_dev *ptdev,
    return 0;
 }
 
+/* read Exp ROM BAR */
+static int pt_exp_rom_bar_reg_read(struct pt_dev *ptdev,
+        struct pt_reg_tbl *cfg_entry,
+        uint32_t *value, uint32_t valid_mask)
+{
+    struct pt_reg_info_tbl *reg = cfg_entry->reg;
+    uint32_t valid_emu_mask = 0;
+    uint32_t val = *value;
+
+    /* use the address reported by OS but not by the device */
+    if ((val & PCI_ROM_ADDRESS_MASK) == 0 &&
+        (ptdev->pci_dev->rom_base_addr & PCI_ROM_ADDRESS_MASK) != 0)
+        val = (ptdev->pci_dev->rom_base_addr & PCI_ROM_ADDRESS_MASK) |
+            (val & (~PCI_ROM_ADDRESS_MASK));
+
+    /* emulate long register */
+    valid_emu_mask = reg->emu_mask & valid_mask;
+    *value = ((val & ~valid_emu_mask) | 
+              (cfg_entry->data & valid_emu_mask));
+
+   return 0;
+}
+
 /* write byte size emulate register */
 static int pt_byte_reg_write(struct pt_dev *ptdev, 
         struct pt_reg_tbl *cfg_entry, 
@@ -2510,6 +2536,12 @@ static int pt_exp_rom_bar_reg_write(struct pt_dev *ptdev,
     uint32_t bar_emu_mask = 0;
     uint32_t bar_ro_mask = 0;
 
+    /* use the address reported by OS but not by the device */
+    if ((dev_value & PCI_ROM_ADDRESS_MASK) == 0 &&
+        (ptdev->pci_dev->rom_base_addr & PCI_ROM_ADDRESS_MASK) != 0)
+        dev_value = (ptdev->pci_dev->rom_base_addr & PCI_ROM_ADDRESS_MASK) |
+            (dev_value & (~PCI_ROM_ADDRESS_MASK));
+
     r = &d->io_regions[PCI_ROM_SLOT];
     r_size = r->size;
     base = &ptdev->bases[PCI_ROM_SLOT];
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