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RE: [Xen-devel] Windows SMP

> >Is there a similar approach that would work on an Intel system?
> On Intel CPU with FlexPriority support, you don't need patching
> guest since TPR accesses would be recognized  by hardware
> for acceleration automatically.
> But on CPUs without h/w acceleration support, you may expect
> borrow that overall idea, but instead of patching with LOCK MOV
> CR0, you would replace it with a piece of code lines to emulate
> similar acceleration as what h/w is assumed to do.

Do you have an example :)

One thing Keir suggested would be to install the patch to jump to some
code which compared the value being written to the TPR register with the
value last written, and only perform the actual write if the values are
different. I can do that without too much fuss but if there is something
faster then even better.



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