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RE: [Xen-devel] TPR write optimization (even improves 2003 sp2)


  • To: "Keir Fraser" <keir.fraser@xxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
  • From: "James Harper" <james.harper@xxxxxxxxxxxxxxxx>
  • Date: Thu, 8 Jan 2009 20:10:12 +1100
  • Cc:
  • Delivery-date: Thu, 08 Jan 2009 01:13:53 -0800
  • List-id: Xen developer discussion <xen-devel.lists.xensource.com>
  • Thread-index: AclwbQESFc81qMn2SR2vAjv2yU5MgQABpemAAAyUQdEAAFfuQAAAdgGuAAA1Q7AAAPb/BAAAN9OgAADpQpkAA5LWcAAAj3LQABWGf/AAA+R78AAGzflAAAs5uXgAAAgFEA==
  • Thread-topic: [Xen-devel] TPR write optimization (even improves 2003 sp2)

> On 08/01/2009 03:53, "James Harper" <james.harper@xxxxxxxxxxxxxxxx>
wrote:
> 
> > One (big?) hiccup... how do I make sure that I am accessing the
vlapic
> > structure for the correct CPU? My current idea of
vlapic[current_cpu] is
> > flawed because a thread switch could occur between getting the
address
> > of the vlapic structure for the current cpu and writing a value to
the
> > mapped register.
> >
> > Is it possible to have per-cpu mapping?
> 
> No.
> 
> > Does disabling interrupts via cli cause a VMEXIT?
> 
> No.
> 

Hmmm... so I could use CLI to disable interrupts to ensure that I'll
remain on the same CPU. This idea isn't totally sunk then...

James

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