[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] RE: [Xen-devel] TPR write optimization (even improves 2003 sp2)
> On 08/01/2009 03:53, "James Harper" <james.harper@xxxxxxxxxxxxxxxx> wrote: > > > One (big?) hiccup... how do I make sure that I am accessing the vlapic > > structure for the correct CPU? My current idea of vlapic[current_cpu] is > > flawed because a thread switch could occur between getting the address > > of the vlapic structure for the current cpu and writing a value to the > > mapped register. > > > > Is it possible to have per-cpu mapping? > > No. > > > Does disabling interrupts via cli cause a VMEXIT? > > No. > Hmmm... so I could use CLI to disable interrupts to ensure that I'll remain on the same CPU. This idea isn't totally sunk then... James _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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