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RE: [Xen-devel] [PATCH] x86 hvm: freeze PIT/LAPIC timer emulation while its IRQ is masked



Cui, Dexuan writes:
> Looks the little win doesn't deserve the increased complexity in code.

Agreed. I don't strongly push my patches. 
But this win is given by 2/2 patch and it fixes a certain bug.
Besides, 1/2 patch simplifies the code, I think.

> BTW, recent Intel CPUs run much faster with respect to VMEntry/VMExit and 
> VMREAD/VMWRITE, so I don't think the SW optimizatin is appearling here. :-)

I have a "Mottainai"(http://en.wikipedia.org/wiki/Mottainai) spirit. :-)

Thanks,
Kouya

> 
> Thanks,
> -- Dexuan
> 
> 
> 
> -----Original Message-----
> From: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx 
> [mailto:xen-devel-bounces@xxxxxxxxxxxxxxxxxxx] On Behalf Of Keir Fraser
> Sent: 2009?9?16? 15:41
> To: Kouya Shimura
> Cc: xen-devel@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [Xen-devel] [PATCH] x86 hvm: freeze PIT/LAPIC timer emulation 
> while its IRQ is masked
> 
> On 16/09/2009 07:46, "Kouya Shimura" <kouya@xxxxxxxxxxxxxx> wrote:
> 
> > I remade the patch and measured the performance win. Attached is
> > a benchmark program which I wrote. It is complied by cygwin's gcc
> > by -O2 and runs on Windows XP(32bit). And my cpu is
> > Intel Core2 Quad Q9450@xxxxxxxx
> > 
> > The result is that my patch saves 32 cycles(TSC) per one VM_EXIT(cpuid).
> > (2696 tsc => 2664 tsc)
> > 
> > The patch is split to two. I'll post them in another mail.
> 
> That's really not enough of a win to bother with, is it.
> 
>  -- Keir
> 
> 
> 
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