[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: [Xen-devel] [PATCH] mask cpuid TSC invariant bit for various circumstances (Take 2)



> On 05/11/2009 21:50, "Dan Magenheimer" 
> <dan.magenheimer@xxxxxxxxxx> wrote:
> 
> > Mask cpuid TSC invariant bit for some circumstances
> > and expose it for others.  On upstream Linux kernels,
> > non-zero Invariant TSC bit permanently selects TSC
> > as the clocksource (currently on Intel only).  When
> > these kernels run on Xen, when migration is possible
> > and TSC is unemulated, this can cause much weirdness.
> > But exposing non-zero Invariant TSC has performance
> > advantages so we want to expose it when it is safe.
> > (Note leaving it exposed/unexposed for dom0 is not an
> > issue.)
> 
> I think I pushed you into changing this in a way I like even 
> less. :-) I can
> live with your original patch, so I'll check that in after all.
> 
>  -- Keir

But note that you were correct that the original patch
didn't work with HVM domains, I presume because the xc cpuid
policy code doesn't initialize 0x80000007.  That's why
I pulled the code out of the loop in domain_cpuid and
then entirely out to time.c

Dan

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel


 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.