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[Xen-devel] Re: [Qemu-devel] [PATCH 12/15] piix_pci: introduce a write_config notifier


  • To: stefano.stabellini@xxxxxxxxxxxxx
  • From: Blue Swirl <blauwirbel@xxxxxxxxx>
  • Date: Thu, 12 Aug 2010 18:35:25 +0000
  • Cc: Anthony.Perard@xxxxxxxxxx, xen-devel@xxxxxxxxxxxxxxxxxxx, qemu-devel@xxxxxxxxxx
  • Delivery-date: Thu, 12 Aug 2010 11:36:25 -0700
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On Thu, Aug 12, 2010 at 2:09 PM,  <stefano.stabellini@xxxxxxxxxxxxx> wrote:
> From: Anthony PERARD <anthony.perard@xxxxxxxxxx>
>
> Introduce a write config notifier in piix_pci, so that clients can be
> notified every time a pci config write happens.
> The patch also makes use of the notification mechanism in
> xen_machine_fv.

Will the mechanism be used elsewhere? If not, I'd just add a call to
xen_piix_pci_write_config_client() to piix_pci.c. It can be surrounded
by Xen #ifdeffery, or you could introduce stubs like kvm-stub.c and
friends.

>
> Signed-off-by: Anthony PERARD <anthony.perard@xxxxxxxxxx>
> Signed-off-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
> ---
> Âhw/pc.h       |  Â1 +
> Âhw/piix_pci.c    |  28 ++++++++++++++++++++++++++++
> Âhw/xen_machine_fv.c | Â 16 ++++++++++++++++
> Â3 files changed, 45 insertions(+), 0 deletions(-)
>
> diff --git a/hw/pc.h b/hw/pc.h
> index ee562cd..3a745ae 100644
> --- a/hw/pc.h
> +++ b/hw/pc.h
> @@ -141,6 +141,7 @@ typedef struct PCII440FXState PCII440FXState;
>
> Âvoid piix3_register_set_irq(pci_set_irq_fn set_irq);
> Âvoid piix3_register_map_irq(pci_map_irq_fn map_irq);
> +void piix_pci_register_write_config_notifier(PCII440FXState *d, 
> PCIConfigWriteFunc *write_config);
> ÂPCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 
> qemu_irq *pic, ram_addr_t ram_size);
> Âvoid i440fx_init_memory_mappings(PCII440FXState *d);
>
> diff --git a/hw/piix_pci.c b/hw/piix_pci.c
> index 56e3f61..afa9e9d 100644
> --- a/hw/piix_pci.c
> +++ b/hw/piix_pci.c
> @@ -49,6 +49,13 @@ struct PCII440FXState {
> Â Â PIIX3State *piix3;
> Â};
>
> +typedef struct PCII440FXWriteConfigNotifier {
> + Â ÂPCIConfigWriteFunc *write_config;
> + Â ÂQLIST_ENTRY(PCII440FXWriteConfigNotifier) next;
> +} PCII440FXWriteConfigNotifier;
> +
> +static QLIST_HEAD(write_config_list, PCII440FXWriteConfigNotifier) 
> write_config_list
> + Â Â= QLIST_HEAD_INITIALIZER(write_config_list);
>
> Â#define I440FX_PAM Â Â Â0x59
> Â#define I440FX_PAM_SIZE 7
> @@ -71,6 +78,25 @@ void piix3_register_map_irq(pci_map_irq_fn map_irq)
> Â Â piix3_map_irq_handler = map_irq;
> Â}
>
> +void piix_pci_register_write_config_notifier(PCII440FXState *d, 
> PCIConfigWriteFunc *write_config)
> +{
> + Â ÂPCII440FXWriteConfigNotifier *new_notifier;
> +
> + Â Âassert(write_config);
> + Â Ânew_notifier = qemu_mallocz(sizeof(PCII440FXWriteConfigNotifier));
> + Â Ânew_notifier->write_config = write_config;
> + Â ÂQLIST_INSERT_HEAD(&write_config_list, new_notifier, next);
> +}
> +
> +static void piix_pci_notify_write_config(PCIDevice *dev, uint32_t address, 
> uint32_t val, int len)
> +{
> + Â ÂPCII440FXWriteConfigNotifier *notifier;
> +
> + Â ÂQLIST_FOREACH(notifier, &write_config_list, next) {
> + Â Â Â Ânotifier->write_config(dev, address, val, len);
> + Â Â}
> +}
> +
> Â/* return the global irq number corresponding to a given device irq
> Â Âpin. We could also use the bus number to have a more precise
> Â Âmapping. */
> @@ -157,6 +183,8 @@ static void i440fx_write_config(PCIDevice *dev,
> Â{
> Â Â PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev);
>
> + Â Âpiix_pci_notify_write_config(dev, address, val, len);
> +
> Â Â /* XXX: implement SMRAM.D_LOCK */
> Â Â pci_default_write_config(dev, address, val, len);
> Â Â if (ranges_overlap(address, len, I440FX_PAM, I440FX_PAM_SIZE) ||
> diff --git a/hw/xen_machine_fv.c b/hw/xen_machine_fv.c
> index 5d553b6..77563db 100644
> --- a/hw/xen_machine_fv.c
> +++ b/hw/xen_machine_fv.c
> @@ -61,6 +61,21 @@ static void xen_piix3_set_irq(void *opaque, int irq_num, 
> int level)
> Â Â Â Â Â Â irq_num & 3, level);
> Â}
>
> +static void xen_piix_pci_write_config_client(PCIDevice *dev,
> + Â Â Â Âuint32_t address, uint32_t val, int len)
> +{
> + Â Âint i;
> +
> + Â Â/* Scan for updates to PCI link routes (0x60-0x63). */
> + Â Âfor (i = 0; i < len; i++) {
> + Â Â Â Âuint8_t v = (val >> (8*i)) & 0xff;
> + Â Â Â Âif (v & 0x80)
> + Â Â Â Â Â Âv = 0;
> + Â Â Â Âv &= 0xf;
> + Â Â Â Âif (((address+i) >= 0x60) && ((address+i) <= 0x63))
> + Â Â Â Â Â Âxc_hvm_set_pci_link_route(xen_xc, xen_domid, address + i - 0x60, 
> v);
> + Â Â}
> +}
>
> Âstatic void xen_init_fv(ram_addr_t ram_size,
> Â Â Â Â Â Â Â Â Â Â Â Â const char *boot_device,
> @@ -141,6 +156,7 @@ static void xen_init_fv(ram_addr_t ram_size,
> Â Â piix3_register_set_irq(xen_piix3_set_irq);
> Â Â piix3_register_map_irq(xen_piix3_map_irq);
> Â Â pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
> + Â Âpiix_pci_register_write_config_notifier(i440fx_state, 
> xen_piix_pci_write_config_client);
> Â Â isa_bus_irqs(isa_irq);
>
> Â Â pc_register_ferr_irq(isa_reserve_irq(13));
> --
> 1.7.0.4
>
>
>

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