[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] Re: [PATCH 05/13] Nested Virtualization: CRn & paged real mode
Hi, > diff -r 0199b689a2d0 -r e0eae5b67977 xen/arch/x86/hvm/hvm.c > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -54,6 +54,7 @@ > #include <asm/hvm/support.h> > #include <asm/hvm/cacheattr.h> > #include <asm/hvm/trace.h> > +#include <asm/hvm/nestedhvm.h> > #include <asm/mtrr.h> > #include <asm/apic.h> > #include <public/sched.h> > @@ -1109,9 +1110,13 @@ int hvm_set_cr0(unsigned long value) > /* ET is reserved and should be always be 1. */ > value |= X86_CR0_ET; > > - if ( (value & (X86_CR0_PE | X86_CR0_PG)) == X86_CR0_PG ) > + if ( !nestedhvm_vmentry_emulate(v) && > + (value & (X86_CR0_PE | X86_CR0_PG)) == X86_CR0_PG ) > goto gpf; The change above makes perfect sense: nested SVM guests should be allowed to enter paged real mode. But I don't understand either of the changes below. Can you explain why the cache control bits get special treatment? Tim. > + if ( nestedhvm_vcpu_in_guestmode(v) ) > + value &= ~(X86_CR0_CD | X86_CR0_NW); > + > if ( (value & X86_CR0_PG) && !(old_value & X86_CR0_PG) ) > { > if ( v->arch.hvm_vcpu.guest_efer & EFER_LME ) > @@ -1163,7 +1168,7 @@ int hvm_set_cr0(unsigned long value) > } > } > > - if ( has_arch_mmios(v->domain) ) > + if ( !nestedhvm_vmentry_emulate(v) && has_arch_mmios(v->domain) ) > { > if ( (value & X86_CR0_CD) && !(value & X86_CR0_NW) ) > { -- Tim Deegan <Tim.Deegan@xxxxxxxxxx> Principal Software Engineer, XenServer Engineering Citrix Systems UK Ltd. (Company #02937203, SL9 0BG) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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