RE: [Xen-devel] Problem: Pattern with vertical colored lines on the dom0 screen

["Kay, Allen M" <allen.m.kay@xxxxxxxxx>]

Attached patch fixes dom0 graphics problem on Levnovo T410 when VT-d is 
enabled.  The patch is derived from a similar quirk in Linux kernel by David 
Woodhouse and Adam Jackson.  It checks for VT enabling bit in IGD GGC register. 
 If VT is not enabled correctly in the IGD, Xen does not enable VT-d 
translation for IGD VT-d engine.  In case where iommu boot parameter is set to 
force, Xen calls panic().

Signed-off-by: Allen Kay allen.m.kay@xxxxxxxxx

-----Original Message-----
From: Konrad Rzeszutek Wilk [mailto:konrad.wilk@xxxxxxxxxx] 
Sent: Monday, September 27, 2010 9:47 AM
To: Dietmar Hahn; Han, Weidong; Kay, Allen M
Cc: Jean Guyader; xen-devel@xxxxxxxxxxxxxxxxxxx
Subject: Re: [Xen-devel] Problem: Pattern with vertical colored lines on the 
dom0 screen

On Mon, Sep 27, 2010 at 02:06:26PM +0200, Dietmar Hahn wrote:
> Hi Jean,
> 
> many thanks for this hint! This saved me a lot of time searching through
> the specs.
> 
> Am 24.09.2010 schrieb Jean Guyader:
> > The problem we saw with that the bit 10 of the GCC (offset 0x52 on the
> > PCH config space)
> > wasn't set after the bios. This bit probably enable the shadow GTT
> > (created with the GTT + vt-d).
> 
> Yes, the same problem here!
> I found the following patch, maybe something similar would help here too?
> https://patchwork.kernel.org/patch/132771

There looks to be another in the upstream kernels:

check_tylersburg_isoch
> 
> So I have to hit the bios development :-(

Well, we should probably provide a quirk check in the Xen code.

Copying the Intel folks to see if they any ideas on adding this in the Intel 
VT-d
code paths. Or they might have already a patch ready for this?
> 
> > The vertical stripes means GTT fault.
> > 
> > Jean
> 
> Many thanks!
> Dietmar.
> 
> -- 
> Company details: http://ts.fujitsu.com/imprint.html
> 
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Attachment: igd-vtd.patch
Description: igd-vtd.patch

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