Re: [Xen-devel] [Patch 2/4] Refining Xsave/Xrestore support

[Haitao Shan <maillists.shan@xxxxxxxxx>]

I have done a quick test on my box, setting XCR0 is around 130 tsc
cycles while reading XCR0 is around 80 tsc cycles.

Shan Haitao

2010/10/28 Jan Beulich <JBeulich@xxxxxxxxxx>:
>>>> On 28.10.10 at 09:52, Haitao Shan <maillists.shan@xxxxxxxxx> wrote:
>> Then I would prefer to write XCR0 unconditionally. Otherwise, I can
>> only refer to the approach for handling CR4 switches: reading CR4
>> first and checking whether there is a need to write actually.
>> But I don't think <a read to XCR0 plus a data comparison> can save any
>> compared with one unconditional write to XCR0.
>> Are you OK with this?
>
> Depends on the performance expectations of xsetbv and xgetbv
> (and its comparison to moves from/to control registers). At least
> there's no word in the documentation that xsetbv would be
> serializing. I would hope Intel could at least provide approximate
> numbers...
>
> Jan
>
>

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