[Xen-devel] [PATCH] Allow dom0 to write MSR IA32_ENERGY_PERF_BIAS

["Wei, Gang" <gang.wei@xxxxxxxxx>]

Allow dom0 to write MSR IA32_ENERGY_PERF_BIAS

There is a new hardware feature, which lets system software to set Energy 
Performance Preference. This is a opaque knob in the form of 
IA32_ENERGY_PERF_BIAS MSR, which has a 4 bit Energy Performance Preference Hint.

The support for this feature is indicated by CPUID.06H.ECX.bit3. Refer to Intel 
Architectures Software Developer's Manual for more info.

Let dom0 tools to control it.

Signed-off-by: Wei Gang <gang.wei@xxxxxxxxx>

diff -r 4e108cf56d07 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c      Mon Dec 27 08:00:09 2010 +0000
+++ b/xen/arch/x86/traps.c      Sat Jan 01 20:01:43 2011 +0800
@@ -2333,6 +2333,7 @@ static int emulate_privileged_op(struct 
                 goto fail;
             break;
         case MSR_IA32_THERM_CONTROL:
+        case MSR_IA32_ENERGY_PERF_BIAS:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
                 goto fail;
             if ( (v->domain->domain_id != 0) || !v->domain->is_pinned )
diff -r 4e108cf56d07 xen/include/asm-x86/msr-index.h
--- a/xen/include/asm-x86/msr-index.h   Mon Dec 27 08:00:09 2010 +0000
+++ b/xen/include/asm-x86/msr-index.h   Sat Jan 01 19:57:58 2011 +0800
@@ -330,6 +330,7 @@
 #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1<<23)
 
 #define MSR_IA32_TSC_DEADLINE          0x000006E0
+#define MSR_IA32_ENERGY_PERF_BIAS      0x000001b0
 
 /* Intel Model 6 */
 #define MSR_P6_EVNTSEL0                        0x00000186

Attachment: msr-energy_perf_bias.patch
Description: msr-energy_perf_bias.patch

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