[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [RFC PATCH 0/2] ASID: Flush by ASID
At 17:55 +0000 on 11 Jan (1294768552), Wei Wang2 wrote: > Future AMD SVM supports a new feature called flush by ASID. The idea is to > allow CPU to flush TLBs associated with the ASID assigned to guest VM. So > hypervisor doesn't have to reassign a new ASID in order to flush guest's > VCPU. Please review it. What advantage does the new system have? Intuitively it seems like it might be a tiny bit fairer and a tiny bit faster (by explicitly flushing instead of relying on LRO) but I'm not convinced that it will be visible in macro-benchmarks. Have you measured it? Cheers, Tim. > Thanks, > Wei > > Signed-off-by: Wei Huang <wei.huang2@xxxxxxx> > Signed-off-by: Wei Wang <wei.wang2@xxxxxxx> > -- > Advanced Micro Devices GmbH > Sitz: Dornach, Gemeinde Aschheim, > Landkreis München Registergericht München, > HRB Nr. 43632 > WEEE-Reg-Nr: DE 12919551 > Geschäftsführer: > Alberto Bozzo, Andrew Bowd > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@xxxxxxxxxxxxxxxxxxx > http://lists.xensource.com/xen-devel -- Tim Deegan <Tim.Deegan@xxxxxxxxxx> Principal Software Engineer, Xen Platform Team Citrix Systems UK Ltd. (Company #02937203, SL9 0BG) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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