Re: [Xen-devel] [PATCH] xen: provide pse36 cpuid bit

[Christoph Egger <Christoph.Egger@xxxxxxx>]

On 10/27/11 17:30, Keir Fraser wrote:
> On 27/10/2011 16:15, "Tim Deegan"<tim@xxxxxxx>  wrote:
>
> > If you mean this:
> >
> >   * PSE disabled / PSE36
> >   * We don't support any modes other than PSE enabled, PSE36 disabled.
> >   * Neither of those would be hard to change, but we'd need to be able to
> >   * deal with shadows made in one mode and used in another.
> >
> > the worry was that we'd need a whole nother shadow mode to handle the
> > case where one VCPU was in normal 32-bit and another was in PSE36 (since
> > they can't share shadows).
> >
> > As it happens the current code does detect PSE-disabled in shadow mode
> > but just DTRT for the current VCPU, so a mix of PSE-enabled and
> > PSE-disabled VCPUs will get unpredicatble results from shadow
> > pagetables. :(
> >
> > Which means that supporting PSE36 to the same degree (i.e. assuming all
> > VCPUs behave the same, or if they don't they don't share pagetables)
> > would be OK too. :)
> Ah, I see. Yes, I guessed it would be supported to just the same degree as
> 'basic' PSE. The likelihood of pagetables being shared across different
> pagetable-related CR4 settings? Not great, we hope. :-)
Is the patch acceptable as it is ?  PSE36 support for 32bit legacy mode
can be done in a seperate patch.

Christoph



--
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel