Re: [Xen-devel] [Patch] X86: expose HLE/RTM features to pv and hvm

[Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>]

On Tue, Feb 28, 2012 at 05:10:55AM +0000, Liu, Jinsong wrote:
> X86: expose HLE/RTM features to pv and hvm
> 
> Intel recently release 2 new features, HLE and TRM.
> Refer to http://software.intel.com/file/41417.
> This patch expose them to pv and hvm

Should this be also exposed to Dom0?

> 
> Signed-off-by: Liu, Jinsong <jinsong.liu@xxxxxxxxx>
> 
> diff -r 8174412310fa tools/libxc/xc_cpufeature.h
> --- a/tools/libxc/xc_cpufeature.h     Mon Feb 27 02:23:43 2012 +0800
> +++ b/tools/libxc/xc_cpufeature.h     Mon Feb 27 03:41:13 2012 +0800
> @@ -129,10 +129,12 @@
>  /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx) */
>  #define X86_FEATURE_FSGSBASE     0 /* {RD,WR}{FS,GS}BASE instructions */
>  #define X86_FEATURE_BMI1         3 /* 1st group bit manipulation extensions 
> */
> +#define X86_FEATURE_HLE          4 /* Hardware Lock Elision */
>  #define X86_FEATURE_AVX2         5 /* AVX2 instructions */
>  #define X86_FEATURE_SMEP         7 /* Supervisor Mode Execution Protection */
>  #define X86_FEATURE_BMI2         8 /* 2nd group bit manipulation extensions 
> */
>  #define X86_FEATURE_ERMS         9 /* Enhanced REP MOVSB/STOSB */
>  #define X86_FEATURE_INVPCID     10 /* Invalidate Process Context ID */
> +#define X86_FEATURE_RTM         11 /* Restricted Transactional Memory */
>  
>  #endif /* __LIBXC_CPUFEATURE_H */
> diff -r 8174412310fa tools/libxc/xc_cpuid_x86.c
> --- a/tools/libxc/xc_cpuid_x86.c      Mon Feb 27 02:23:43 2012 +0800
> +++ b/tools/libxc/xc_cpuid_x86.c      Mon Feb 27 03:41:13 2012 +0800
> @@ -362,11 +362,13 @@
>      case 0x00000007: /* Intel-defined CPU features */
>          if ( input[1] == 0 ) {
>              regs[1] &= (bitmaskof(X86_FEATURE_BMI1) |
> +                        bitmaskof(X86_FEATURE_HLE)  |
>                          bitmaskof(X86_FEATURE_AVX2) |
>                          bitmaskof(X86_FEATURE_SMEP) |
>                          bitmaskof(X86_FEATURE_BMI2) |
>                          bitmaskof(X86_FEATURE_ERMS) |
>                          bitmaskof(X86_FEATURE_INVPCID) |
> +                        bitmaskof(X86_FEATURE_RTM)  |
>                          bitmaskof(X86_FEATURE_FSGSBASE));
>          } else
>              regs[1] = 0;
> @@ -495,9 +497,11 @@
>      case 0x00000007:
>          if ( input[1] == 0 )
>              regs[1] &= (bitmaskof(X86_FEATURE_BMI1) |
> +                        bitmaskof(X86_FEATURE_HLE)  |
>                          bitmaskof(X86_FEATURE_AVX2) |
>                          bitmaskof(X86_FEATURE_BMI2) |
>                          bitmaskof(X86_FEATURE_ERMS) |
> +                        bitmaskof(X86_FEATURE_RTM)  |
>                          bitmaskof(X86_FEATURE_FSGSBASE));
>          else
>              regs[1] = 0;


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