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[Xen-devel] [PATCH] x86/PCI: pass correct register value to XSM



When attempting to use AMD's extension to access the extended PCI config
space, only the low byte of the register number was being passed to XSM.
Include the correct value of the register if this feature is enabled;
otherwise, bits 24-30 of port cf8 are reserved, so disallow the invalid
access.

Signed-off-by: Daniel De Graaf <dgdegra@xxxxxxxxxxxxx>
---
 xen/arch/x86/traps.c |   13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 2264583..d836452 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1686,11 +1686,24 @@ static int pci_cfg_ok(struct domain *d, int write, int 
size)
 {
     uint32_t machine_bdf;
     uint16_t start, end;
+    uint64_t msr_val;
     if (!IS_PRIV(d))
         return 0;
 
     machine_bdf = (d->arch.pci_cf8 >> 8) & 0xFFFF;
     start = d->arch.pci_cf8 & 0xFF;
+    if ( d->arch.pci_cf8 & 0x0F000000 )
+    {
+        /* Possible AMD extended configuration access */
+        if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ||
+             boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x17 )
+            return 0;
+        if ( rdmsr_safe(MSR_AMD64_NB_CFG, msr_val) )
+            return 0;
+        if ( !(msr_val & (1ULL << AMD64_NB_CFG_CF8_EXT_ENABLE_BIT)) )
+            return 0;
+        start |= (d->arch.pci_cf8 >> 16) & 0xF00;
+    }
     end = start + size - 1;
     if (xsm_pci_config_permission(d, machine_bdf, start, end, write))
         return 0;
-- 
1.7.10.2


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