[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH] xen/x86: Add support for cpuid masking on Intel Xeon Processor E5 Family
Although the "Intel Virtualization Technology FlexMigration Application Note" (http://www.intel.com/Assets/PDF/manual/323850.pdf) does not document support for extended model 2H model DH (Intel Xeon Processor E5 Family), empirical evidence shows that the same MSR addresses can be used for cpuid masking as exdended model 2H model AH (Intel Xen Processor E3-1200 Family). Signed-off-by: Matt Wilson <msw@xxxxxxxxxx> diff -r e6266fc76d08 -r bf922651da96 xen/arch/x86/cpu/intel.c --- a/xen/arch/x86/cpu/intel.c Fri Jul 27 12:22:13 2012 +0200 +++ b/xen/arch/x86/cpu/intel.c Sat Jul 28 17:27:30 2012 +0000 @@ -104,7 +104,7 @@ static void __devinit set_cpuidmask(cons return; extra = "xsave "; break; - case 0x2a: + case 0x2a: case 0x2d: wrmsr(MSR_INTEL_CPUID1_FEATURE_MASK_V2, opt_cpuid_mask_ecx, opt_cpuid_mask_edx); _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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