Re: [Xen-devel] Xen4.2 S3 regression?

[Ben Guthro <ben@xxxxxxxxxx>]

On Wed, Sep 26, 2012 at 6:43 AM, Jan Beulich <JBeulich@xxxxxxxx> wrote:

Btw., I'm also puzzled by only seeing a ucode update message
here for CPU1 - I just went through the logic again and can't see
why this would not also be done for CPU0. Could you make the
pr_debug() in microcode_intel.c actually print something, so we
can see whether at least collect_cpu_info() would get called
for it, hopefully allowing to deduce what happens subsequently?

I put a pr_debug at the top of collect_cpu_info - and from the trace below - it appears everything is as it should be,

dom0 and Xen serial output get interspersed there for a few lines, but the microcode is, in fact being loaded for both CPUs.

[   36.787452] ACPI: Preparing to enter system sleep state S3

[   37.240118] PM: Saving platform NVS memory

[   37.313160] Disabling non-boot CPUs ...

(XEN) Preparing system for ACPI S3 state.

(XEN) Disabling non-boot CPUs ...

(XEN) Breaking vcpu affinity for domain 0 vcpu 1

(XEN) Entering ACPI S3 state.

(XEN) mce_intel.c:1239: MCA Capability: BCAST 1 SER 0 CMCI 0 firstbank 1 extended MCE MSR 0

(XEN) CMCI: CPU0 has no CMCI support

(XEN) CPU0: Thermal monitoring enabled (TM2)

(XEN) Finishing wakeup from ACPI S3 state.

(XEN) microcode: collect_cpu_info for CPU0

(XEN) microcode: collect_cpu_info : sig=0x10676, pf=0x80, rev=0x60c

(XEN) Enabling non-boot CPUs  ...

(XEN) Booting processor 1/1 eip 8a000

(XEN) Initializing CPU#1

(XEN) CPU: L1 I cache: 32K, L1 D cache: 32K

(XEN) CPU: L2 cache: 3072K

(XEN) CPU: Physical Processor ID: 0

(XEN) CPU: Processor Core ID: 1

(XEN) CMCI: CPU1 has no CMCI support

(XEN) CPU1: Thermal monitoring enabled (TM2)

(XEN) CPU1: Intel(R) Core(TM)2 Duo CPU     P8400  @ 2.26GHz stepping 06

(XEN) microcode: collect_cpu_info for CPU1

[   37.420030] A(XEN) microcode: collect_cpu_info : sig=0x10676, pf=0x80, rev=0x60c

CPI: Low-level r(XEN) microcode: CPU1 found a matching microcode update with version 0x60f (current=0x60c)

esume complete

(XEN) microcode: CPU1 updated from revision 0x60c to 0x60f, date = 2010-09-29 

[   37.420030] PM: Restoring platform NVS memory

(XEN) microcode: collect_cpu_info for CPU0

(XEN) microcode: collect_cpu_info : sig=0x10676, pf=0x80, rev=0x60c

(XEN) microcode: collect_cpu_info for CPU1

(XEN) microcode: collect_cpu_info : sig=0x10676, pf=0x80, rev=0x60f

[   37.431008] Enabling non-boot CPUs ...

[   37.434851] installing Xen timer for CPU 1

[   37.439031] cpu 1 spinlock event irq 279

[   37.327214] Disabled fast string operations

[   37.458040] CPU1 is up

[   37.465417] ACPI: Waking up from system sleep state S3

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