Re: [Xen-devel] [PATCH 05/45] arm: avoid inline asm for dsb, isb, wfi and sev.

[Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>]

On Wed, 23 Jan 2013, Ian Campbell wrote:
> "dsb" must be written "dsb sy" on arm64. "dsb sy" is also valid (and
> synonymous) on arm32 but we have a macro so lets use it.
> 
> Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>

Acked-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>

>  xen/arch/arm/domain.c  |    5 ++++-
>  xen/arch/arm/smpboot.c |   10 ++++++----
>  2 files changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> index 59d8d73..5506f78 100644
> --- a/xen/arch/arm/domain.c
> +++ b/xen/arch/arm/domain.c
> @@ -27,7 +27,10 @@ void idle_loop(void)
>  
>          local_irq_disable();
>          if ( cpu_is_haltable(smp_processor_id()) )
> -            asm volatile ("dsb; wfi");
> +        {
> +            dsb();
> +            wfi();
> +        }
>          local_irq_enable();
>  
>          do_tasklet();
> diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
> index c7a586b..8956ead 100644
> --- a/xen/arch/arm/smpboot.c
> +++ b/xen/arch/arm/smpboot.c
> @@ -122,7 +122,8 @@ make_cpus_ready(unsigned int max_cpus, unsigned long 
> boot_phys_offset)
>          /* TODO: handle boards where CPUIDs are not contiguous */
>          *gate = i;
>          flush_xen_dcache(*gate);
> -        asm volatile("isb; sev");
> +        isb();
> +        sev();
>          /* And wait for it to respond */
>          while ( ready_cpus < i )
>              smp_rmb();
> @@ -205,8 +206,8 @@ void stop_cpu(void)
>      /* Make sure the write happens before we sleep forever */
>      dsb();
>      isb();
> -    while ( 1 ) 
> -        asm volatile("wfi");
> +    while ( 1 )
> +        wfi();
>  }
>  
>  /* Bring up a remote CPU */
> @@ -221,7 +222,8 @@ int __cpu_up(unsigned int cpu)
>      /* we need to make sure that the change to smp_up_cpu is visible to
>       * secondary cpus with D-cache off */
>      flush_xen_dcache(smp_up_cpu);
> -    asm volatile("isb; sev");
> +    isb();
> +    sev();
>  
>      while ( !cpu_online(cpu) )
>      {
> -- 
> 1.7.2.5
> 

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