Re: [Xen-devel] [PATCH] AMD/iommu: SR56x0 Erratum 64 - Reset Command and Event head & tail pointers

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 21.05.13 at 18:36, Andrew Cooper <andrew.cooper3@xxxxxxxxxx> wrote:
> On 21/05/13 16:14, Jan Beulich wrote:
>>>>> On 21.05.13 at 16:52, Andrew Cooper <andrew.cooper3@xxxxxxxxxx> wrote:
>>> The code appears to lack an MMIO 64bit write function which would be the
>>> correct solution here.  However, for these four registers, bit 19 is the
>>> highest non-reserved bit, meaning that the writel() will do the correct 
>>> thing.
>>>
>>> I suspect that a writeq() function would make a huge difference to the
>>> legibility and brevity of this code.
>> Oh, we should of course have a writeq() - I think I stumbled across
>> the lack thereof too, and probably more than once.
> 
> At the moment, writel() is using a voiltile int * cast.  Given that the
> b,w,l and q suffixes have specific widths implied, would it be better to
> use explicit uintX_t casts?

Yes, and indeed - as you already suggest - they should also be
converted to unsigned types; similarly for read{b,w,l,q}().

The only problem here is with you likely wanting this backported:
I'm not sure adding writeq() for x86-32 makes a whole lot of sense,
and hence I'd recommend re-submitting the patch here just with
the PPR log addition, and then a second one doing the cleanup.
Then we can backport the first one, but leave the second one for
just -unstable.

Jan


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