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[Xen-devel] [xen-unstable test] 18080: trouble: broken/fail/pass

flight 18080 xen-unstable real [real]

Failures and problems with tests :-(

Tests which did not succeed and are blocking,
including tests which could not be run:
 test-amd64-i386-pv            3 host-install(3)         broken REGR. vs. 18076

Tests which did not succeed, but are not blocking:
 test-amd64-amd64-xl-pcipt-intel  9 guest-start                 fail never pass
 test-amd64-i386-xend-winxpsp3 16 leak-check/check             fail  never pass
 test-amd64-amd64-xl-qemut-win7-amd64 13 guest-stop             fail never pass
 test-amd64-amd64-xl-qemuu-winxpsp3 13 guest-stop               fail never pass
 test-amd64-amd64-xl-win7-amd64 13 guest-stop                   fail never pass
 test-amd64-i386-xl-win7-amd64 13 guest-stop                   fail  never pass
 test-amd64-i386-xl-qemut-win7-amd64 13 guest-stop              fail never pass
 test-amd64-amd64-xl-winxpsp3 13 guest-stop                   fail   never pass
 test-amd64-amd64-xl-qemut-winxpsp3 13 guest-stop               fail never pass
 test-amd64-i386-xl-winxpsp3-vcpus1 13 guest-stop               fail never pass
 test-amd64-i386-xl-qemut-winxpsp3-vcpus1 13 guest-stop         fail never pass
 test-amd64-i386-xend-qemut-winxpsp3 16 leak-check/check        fail never pass
 test-amd64-amd64-xl-qemuu-win7-amd64 13 guest-stop             fail never pass

version targeted for testing:
 xen                  10b2b21a241795394637167bd4b076f2de17741f
baseline version:
 xen                  365c95f7de789e1dca03f119eab7dc61fe0f77c9

People who touched revisions under test:
  George Dunlap <george.dunlap@xxxxxxxxxxxxx>
  Jan Beulich <jbeulich@xxxxxxxx>
  Keir Fraser <keir@xxxxxxx>

 build-amd64                                                  pass    
 build-armhf                                                  pass    
 build-i386                                                   pass    
 build-amd64-oldkern                                          pass    
 build-i386-oldkern                                           pass    
 build-amd64-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl                                          pass    
 test-amd64-i386-xl                                           pass    
 test-amd64-i386-rhel6hvm-amd                                 pass    
 test-amd64-i386-qemut-rhel6hvm-amd                           pass    
 test-amd64-i386-qemuu-rhel6hvm-amd                           pass    
 test-amd64-amd64-xl-qemut-win7-amd64                         fail    
 test-amd64-i386-xl-qemut-win7-amd64                          fail    
 test-amd64-amd64-xl-qemuu-win7-amd64                         fail    
 test-amd64-amd64-xl-win7-amd64                               fail    
 test-amd64-i386-xl-win7-amd64                                fail    
 test-amd64-i386-xl-credit2                                   pass    
 test-amd64-amd64-xl-pcipt-intel                              fail    
 test-amd64-i386-rhel6hvm-intel                               pass    
 test-amd64-i386-qemut-rhel6hvm-intel                         pass    
 test-amd64-i386-qemuu-rhel6hvm-intel                         pass    
 test-amd64-i386-xl-multivcpu                                 pass    
 test-amd64-amd64-pair                                        pass    
 test-amd64-i386-pair                                         pass    
 test-amd64-amd64-xl-sedf-pin                                 pass    
 test-amd64-amd64-pv                                          pass    
 test-amd64-i386-pv                                           broken  
 test-amd64-amd64-xl-sedf                                     pass    
 test-amd64-i386-xl-qemut-winxpsp3-vcpus1                     fail    
 test-amd64-i386-xl-winxpsp3-vcpus1                           fail    
 test-amd64-i386-xend-qemut-winxpsp3                          fail    
 test-amd64-amd64-xl-qemut-winxpsp3                           fail    
 test-amd64-amd64-xl-qemuu-winxpsp3                           fail    
 test-amd64-i386-xend-winxpsp3                                fail    
 test-amd64-amd64-xl-winxpsp3                                 fail    

sg-report-flight on woking.cam.xci-test.com
logs: /home/xc_osstest/logs
images: /home/xc_osstest/images

Logs, config files, etc. are available at

Test harness code can be found at

Not pushing.

commit 10b2b21a241795394637167bd4b076f2de17741f
Author: Jan Beulich <jbeulich@xxxxxxxx>
Date:   Tue Jun 4 17:25:41 2013 +0200

    x86: fix XCR0 handling
    - both VMX and SVM ignored the ECX input to XSETBV
    - both SVM and VMX used the full 64-bit RAX when calculating the input
      mask to XSETBV
    - faults on XSETBV did not get recovered from
    Also consolidate the handling for PV and HVM into a single function,
    and make the per-CPU variable "xcr0" static to xstate.c.
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Keir Fraser <keir@xxxxxxx>
    Acked-by: George Dunlap <george.dunlap@xxxxxxxxxxxxx>

commit 10f969150025498fe27d985f9021a68f8c7acc31
Author: Jan Beulich <jbeulich@xxxxxxxx>
Date:   Tue Jun 4 17:23:11 2013 +0200

    x86: preserve FPU selectors for 32-bit guest code
    Doing {,F}X{SAVE,RSTOR} unconditionally with 64-bit operand size leads
    to the selector values associated with the last instruction/data
    pointers getting lost. This, besides being inconsistent and not
    compatible with native hardware behavior especially for 32-bit guests,
    leads to bug checks in 32-bit Windows when running with "Driver
    verifier" (see e.g. http://support.microsoft.com/kb/244617).
    In a first try I made the code figure out the current guest mode, but
    that has the disadvantage of only taking care of the issue when the
    guest executes in the mode for which the state currently is (i.e.
    namely not in the case of a 64-bit guest running a 32-bit application,
    but being in kernle [64-bit] mode).
    The solution presented here is to conditionally execute an auxiliary
    FNSTENV and use the selectors from there.
    In either case the determined word size gets stored in the last byte
    of the FPU/SSE save area, which is available for software use (and I
    verified is being cleared to zero by all versions of Xen, i.e. will not
    present a problem when migrating guests from older to newer hosts), and
    evaluated for determining the operand size {,F}XRSTOR is to be issued
    Note that I did check whether using a second FXSAVE or a partial second
    XSAVE would be faster than FNSTENV - neither on my Westmere (FXSAVE)
    nor on my Romley (XSAVE) they are.
    I was really tempted to use branches into the middle of instructions
    (i.e. past the REX64 prefixes) here, as that would have allowed to
    collapse the otherwise identical fault recovery blocks. I stayed away
    from doing so just because I expect others to dislike such slightly
    subtle/tricky code.
    Reported-by: Ben Guthro <Benjamin.Guthro@xxxxxxxxxx>
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Keir Fraser <keir@xxxxxxx>
    Acked-by: George Dunlap <george.dunlap@xxxxxxxxxxxxx>
(qemu changes not included)

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