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Re: [Xen-devel] [PATCH RFC 2/4] Implement arch_hvm_save and arch_hvm_load functions

> > +
> > +#define HVM_FILE_MAGIC   0x92385520
> > +#define HVM_FILE_VERSION 0x00000001
> > +
> > +struct hvm_save_header {
> > +    uint32_t magic;             /* Must be HVM_FILE_MAGIC */
> > +    uint32_t version;           /* File format version */
> > +    uint64_t changeset;         /* Version of Xen that saved this file */
> > +    uint32_t cpuid;             /* CPUID[0x01][%eax] on the saving machine */
> The comment here looks x86 to be specific.


Ooops, I forget to modify the comments.

> Need to consider whether MIDR is sufficient for the safety check we have
> or whether it is appropriate in the header at all, perhaps it should be
> in a separate cpu features save header?

Acording to ARMv7 architecture reference manual, there are two ID

registers: MIDR (Main ID Register) and REVIDR (REVision ID Register).

MIDR consists of: Implementer, variant, architecture, primiary part number,

and revision. REVIDR is implementer-defined revision number of the processor.

Additionally, I noticed there are two more registers for describing processors,

which are ID_PFR0/1 which are processor feature registers.


To sum up, regisers are MIDR, REVIDR, ID_PFR0, and ID_PFR1

I think if we use all of them for safety check, it is sufficient.

(Maybe it is too much?)



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