[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] xen/arm: Use the right GICD register to initialize IRQs routing
On Thu, 2013-06-13 at 15:30 +0100, Julien Grall wrote: > Currently IRQs routing is initialized to the wrong register and overwrites > interrupt configuration register (ICFGRn). > Furthermore, the register describes target CPUs for 4 interrupts, update > the cpumask variable to also redirect the last interrupts to the current cpu. > > Reported-by: Sander Bogaert <sander.bogaert@xxxxxxxxxxxxx> > Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx> > --- > xen/arch/arm/gic.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > index a7a70b8..181e12a 100644 > --- a/xen/arch/arm/gic.c > +++ b/xen/arch/arm/gic.c > @@ -274,6 +274,7 @@ static void __init gic_dist_init(void) > > cpumask |= cpumask << 8; > cpumask |= cpumask << 16; > + cpumask |= cpumask << 24; This is a bit tricky but given cpumask == 0xAA then: cpumask |= cpumask << 8 : cpumask is now 0xAAAA cpumask |= cpumask << 16 : cpumask is now 0xAAAAAAAA IOW I think the existing code is correct. > > /* Disable the distributor */ > GICD[GICD_CTLR] = 0; > @@ -292,7 +293,7 @@ static void __init gic_dist_init(void) > > /* Route all global IRQs to this CPU */ > for ( i = 32; i < gic.lines; i += 4 ) > - GICD[GICD_ICFGR + i / 4] = cpumask; > + GICD[GICD_ITARGETSR + i / 4] = cpumask; > > /* Default priority for global interrupts */ > for ( i = 32; i < gic.lines; i += 4 ) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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