Re: [Xen-devel] [PATCH 2/4] xen/arm: introduce Allwinner sun6i SOC basic support

[Ian Campbell <Ian.Campbell@xxxxxxxxxx>]

On Tue, 2013-06-18 at 00:35 -0600, Bamvor Jian Zhang wrote:
> > This does appear to use a distinct set of registers from either the
> > existing pl011 or exynos4xxx UART driver so it should be a separate
> > driver. Do you know if this particular logic block is specific to sn6i
> > or is it used elsewhere (e.g. in all sun*i)? Do you know if there is a
> > more generic name for the part?
> sun4i, sun5i use the Synopsys DesignWare 8250 IP. and sun6i is also the
> 8250 compatiblity one. how about i create a debug-8250.inc and update
> it when other 8250 device add.

Yes if this is an 8250 compatible implementation the debug-8250.inc is
the right answer.

OOI Did you find the UART easily available on your platform? IOW was
soldering required...

> > Not a big deal -- we can always rename to be more generic as we see
> > other examples of the same UART.
> >
> >> + * rb: register which contains the UART base address
> >> + * rc: scratch register 1 (unused here)
> >> + * rd: scratch register 2 (unused here) */
> >> +.macro early_uart_init rb, rc, rd
> >> +/* assume the uart already init by bootloader */
> >> +.endm
> >
> > I think Andre's refactoring of the UART init stuff in and around commit
> > 130645eee340608c12b632535d3f983508348ba1 lets you avoid this by just not
> > setting EARLY_PRINTK_INIT_UART.

> yes. I saw Andre' patch. when i write this piece of code Andre's patch is
> not commit. i will modify this in next version.

Thanks.

> >
> >> +
> >> +/* sun6i UART wait UART to be ready to transmit
> >> + * rb: register which contains the UART base address
> >> + * rc: scratch register */
> >> +.macro early_uart_ready rb, rc
> >> +1:
> >> +        ldr   \rc, [\rb, #0x7c]     /* <- UART_USR (Status Register) */

I think this register is a designware extension to the 8250. The Linux
sunxi debug driver is instead checking the UART_LSR for the TEMT or THRE
bits.

> >> +        tst   \rc, #0x2             /* Check BUSY bit */
> >> +        beq   1b                    /* Wait for the UART to be ready */
> >> +.endm

Ian.


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