Re: [Xen-devel] [PATCH v2 2/5] VMX/Viridian: suppress MSR-based APIC suggestion when having APIC-V

[Paul Durrant <Paul.Durrant@xxxxxxxxxx>]

> -----Original Message-----
> From: Jan Beulich [mailto:JBeulich@xxxxxxxx]
> Sent: 24 June 2013 08:05
> To: xen-devel
> Cc: Paul Durrant; George Dunlap; Eddie Dong; Jun Nakajima; Yang Z Zhang;
> Keir (Xen.org)
> Subject: [PATCH v2 2/5] VMX/Viridian: suppress MSR-based APIC suggestion
> when having APIC-V
> 
> When the CPU has the necessary capabilities, having Windows use
> synthetic MSR reads/writes is bogus, as this still requires emulation
> (which is pretty much guaranteed to be slower than having the hardware
> carry out the operation).
> 
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> 

Seems better just to not use the MSR in this case so I favour this patch over 
#1, hence

Ack-ed by: Paul Durrant <paul.durrant@xxxxxxxxxx>

> --- a/xen/arch/x86/hvm/viridian.c
> +++ b/xen/arch/x86/hvm/viridian.c
> @@ -87,8 +87,9 @@ int cpuid_viridian_leaves(unsigned int l
>          if ( (d->arch.hvm_domain.viridian.guest_os_id.raw == 0) ||
>               (d->arch.hvm_domain.viridian.guest_os_id.fields.os < 4) )
>              break;
> -        *eax = (CPUID4A_MSR_BASED_APIC |
> -                CPUID4A_RELAX_TIMER_INT);
> +        *eax = CPUID4A_RELAX_TIMER_INT;
> +        if ( !cpu_has_vmx_apic_reg_virt )
> +            *eax |= CPUID4A_MSR_BASED_APIC;
>          *ebx = 2047; /* long spin count */
>          break;
>      }
> 
> 


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