Re: [Xen-devel] [PATCH] Nested VMX: Flush TLBs and Caches if paging mode changed

[Keir Fraser <keir.xen@xxxxxxxxx>]

On 06/08/2013 15:08, "Yang Zhang" <yang.z.zhang@xxxxxxxxx> wrote:

> From: Yang Zhang <yang.z.zhang@xxxxxxxxx>
> 
> According to SDM, if paging mode is changed, then whole TLBs and caches will
> be flushed. This is missed in nested handle logic. Also this fixed the issue
> that 64 bits windows cannot boot up on top of L1 kvm.
> 
> Signed-off-by: Yang Zhang <yang.z.zhang@xxxxxxxxx>

Acked-by: Keir Fraser <keir@xxxxxxx>

> ---
>  xen/arch/x86/mm/paging.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c
> index cd08b2a..4ba7669 100644
> --- a/xen/arch/x86/mm/paging.c
> +++ b/xen/arch/x86/mm/paging.c
> @@ -709,6 +709,7 @@ void paging_update_nestedmode(struct vcpu *v)
>      else
>          /* TODO: shadow-on-shadow */
>          v->arch.paging.nestedmode = NULL;
> +    hvm_asid_flush_vcpu(v);
>  }
>  
>  void paging_write_p2m_entry(struct p2m_domain *p2m, unsigned long gfn,



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