[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 1/1] x86/AMD: Fix setup ssss:bb:dd:f for d0 failed
On 08.08.2013 14:29, Jan Beulich wrote: >>>> On 08.08.13 at 14:07, Stefan Bader <stefan.bader@xxxxxxxxxxxxx> wrote: >> On 08.08.2013 13:49, Jan Beulich wrote: >>> Question is - did you in particular try with a legacy PCI device >>> behind a legacy PCI bridge? That's the main scenario where the >>> bridge not having got mapped could result in problems (see my >>> other reply to Suravee on this thread). >> >> Not sure whether I confuse things here. Would the VGA card be what you >> meant? > > If the output you provided was complete, then this really seems to > be a legacy PCI device, so yes. But please realize that this working > for you is not a guarantee that it's working in general - whether > requests get forwarded by legacy bridges with the original requester > ID or the bridge's is subject to the bridge implementation afaik. So a > theoretical answer is going to be needed here anyway... But thanks > for clarifying! No, sure it is only one piece of the puzzle and a completing theoretical answer is needed. Would not want to rely on any single testing. -Stefan > > Jan > >> -[0000:00]-+-00.0 Advanced Micro Devices, Inc. [AMD/ATI] RD890 PCI to PCI >> bridg >> e (external gfx0 port A) [1002:5a13] >> ... >> +-14.4-[04]----04.0 Matrox Electronics Systems Ltd. MGA G200eW >> WPCM450 [102b:0532] >> >> 00:14.4 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 PCI >> to >> PCI Bridge [1002:4384] (prog-if 01 [Subtractive decode]) >> Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- >> Stepping- >> SERR+ FastB2B- DisINTx- >> Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- >> <TAbort- >> <MAbort- >SERR- <PERR- INTx- >> Latency: 64 >> Bus: primary=00, secondary=04, subordinate=04, sec-latency=64 >> I/O behind bridge: 0000f000-00000fff >> Memory behind bridge: fdf00000-fe7fffff >> Prefetchable memory behind bridge: fc000000-fcffffff >> Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- >> <TAbort- >> <MAbort+ <SERR- <PERR- >> BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- >> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- >> >> 04:04.0 VGA compatible controller [0300]: Matrox Electronics Systems Ltd. >> MGA >> G200eW WPCM450 [102b:0532] (rev 0a) (prog-if 00 [VGA controller]) >> Subsystem: Super Micro Computer Inc Device [15d9:a711] >> Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- >> Stepping- >> SERR- FastB2B- DisINTx- >> Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- >> <TAbort- >> <MAbort- >SERR- <PERR- INTx- >> Latency: 64 (4000ns min, 8000ns max), Cache Line Size: 64 bytes >> Interrupt: pin A routed to IRQ 10 >> Region 0: Memory at fc000000 (32-bit, prefetchable) [size=16M] >> Region 1: Memory at fdffc000 (32-bit, non-prefetchable) [size=16K] >> Region 2: Memory at fe000000 (32-bit, non-prefetchable) [size=8M] >> Expansion ROM at <unassigned> [disabled] >> Capabilities: [dc] Power Management version 1 >> Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA >> PME(D0-,D1-,D2-,D3hot-,D3cold-) >> Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- > > > Attachment:
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