[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v5] interrupts: allow guest to set/clear MSI-X mask bit
>>> On 15.08.13 at 16:03, Joby Poriyath <joby.poriyath@xxxxxxxxxx> wrote: > Guest needs the ability to enable and disable MSI-X interrupts > by setting the MSI-X control bit, for a passed-through device. > Guest is allowed to write MSI-X mask bit only if Xen *thinks* > that mask is clear (interrupts enabled). If the mask is set by > Xen (interrupts disabled), writes to mask bit by the guest is > ignored. > > Currently, a write to MSI-X mask bit by the guest is silently > ignored. > > A likely scenario is where we have a 82599 SR-IOV nic passed > through to a guest. From the guest if you do > > ifconfig <ETH_DEV> down > ifconfig <ETH_DEV> up > > the interrupts remain masked. On VF reset, the mask bit is set > by the controller. At this point, Xen is not aware that mask is set. > However, interrupts are enabled by VF driver by clearing the mask > bit by writing directly to BAR3 region containing the MSI-X table. > > From dom0, we can verify that > interrupts are being masked using 'xl debug-keys M'. > > Initially, guest was allowed to modify MSI-X bit. > Later this behaviour was changed. > See changeset 74c213c506afcd74a8556dd092995fd4dc38b225. > > Signed-off-by: Joby Poriyath <joby.poriyath@xxxxxxxxxx> > --- You should start getting used to describe the changes compared to at least the most recent previous revision here. > @@ -328,7 +358,8 @@ const struct hvm_mmio_handler msixtbl_mmio_handler = { > static void add_msixtbl_entry(struct domain *d, > struct pci_dev *pdev, > uint64_t gtable, > - struct msixtbl_entry *entry) > + struct msixtbl_entry *entry, > + struct pirq *pirq) Sill missing the const here (this is where Andrew had pointed it out initially, the other change above just is a necessary consequence). Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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